Patents by Inventor Ming-Wei Lin

Ming-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12063849
    Abstract: A flexible display module includes a first light-transmissive layer and a first display layer. The first light-transmissive layer includes a display surface. The first light-transmissive layer has a first width in a second direction. The first display layer is disposed below the first light-transmissive layer. The first display layer has a second width in the second direction. The first display layer includes a circuit layer. The flexible display module is configured to be bent along an axis, the axis extends along a first direction, the first direction is perpendicular to the second direction, and the first width is greater than the second width. A line width of the circuit layer more close to a periphery of the display surface is less than a line width of the circuit layer more close to an inner area of the display surface.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: August 13, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Ming-Chang Hsu, Chih-Chieh Lin, Ming-Hsuan Yu, Ming-Wei Lin
  • Patent number: 11590174
    Abstract: Disclosed herein is a method for treating an osteoarthritis in a subject in need thereof. The method mainly includes administering to the subject an effective amount of isolated mitochondria. According to some embodiments of the present disclosure, the isolated mitochondria are administered to the subject in need in the amount of about 1 mg/kg to about 100 mg/kg.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 28, 2023
    Assignee: E-DA CANCER HOSPITAL
    Inventors: Ming-Wei Lin, Hsin-Yi Tsai, I-Ming Jou, Chin-Hsien Wu
  • Publication number: 20220209146
    Abstract: A flexible display module includes a first light-transmissive layer and a first display layer. The first light-transmissive layer includes a display surface. The first light-transmissive layer has a first width in a second direction. The first display layer is disposed below the first light-transmissive layer. The first display layer has a second width in the second direction. The first display layer includes a circuit layer. The flexible display module is configured to be bent along an axis, the axis extends along a first direction, the first direction is perpendicular to the second direction, and the first width is greater than the second width. A line width of the circuit layer more close to a periphery of the display surface is less than a line width of the circuit layer more close to an inner area of the display surface.
    Type: Application
    Filed: November 4, 2021
    Publication date: June 30, 2022
    Inventors: Ming-Chang HSU, Chih-Chieh LIN, Ming-Hsuan YU, Ming-Wei LIN
  • Publication number: 20220096557
    Abstract: Disclosed herein is a method for treating an osteoarthritis in a subject in need thereof. The method mainly includes administering to the subject an effective amount of isolated mitochondria. According to some embodiments of the present disclosure, the isolated mitochondria are administered to the subject in need in the amount of about 1 mg/kg to about 100 mg/kg.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Applicant: E-DA CANCER HOSPITAL
    Inventors: Ming-Wei LIN, Hsin-Yi TSAI, I-Ming JOU, Chin-Hsien WU
  • Patent number: 11211445
    Abstract: The foldable display panel includes a substrate and a pixel array. The substrate has a surface and display and periphery areas thereon. The periphery area is on at least one side of the display area, and has first and second bonding areas. The first and second bonding areas are at opposite first and second sides of the periphery area, respectively. The first and second bonding areas are spaced apart by a first distance along a first direction. The substrate has a foldable line passing through a center of the display area between the first and the second bonding areas. The first and second sides are on two sides of the foldable line. The pixel array is on the display area and overlaps the foldable line. The pixel array is between the first and second sides and includes sub pixel units arranged in an array.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: December 28, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Ming-Wei Lin, Pao-Yu Huang, Wen-Hui Lee
  • Patent number: 10937722
    Abstract: A device substrate includes a first substrate, a second substrate, a plurality of first bonding pads, a plurality of second bonding pads, a plurality of first leads, and a plurality of second leads. The first and second bonding pads are separated from each other. The first bonding pads are arranged in a first column. The second bonding pads are arranged in a second column. The first and second leads respectively overlap the first and second bonding pads. The first lead includes a first extension portion and a first branch portion. The first extension portion extends from the first column to the second column. The first branch portion is connected to an end of the first extension portion close to the second column. An angle is present between the first extension portion and the first branch portion.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: March 2, 2021
    Assignee: Au Optronics Corporation
    Inventors: Ming-Wei Lin, Pin-Miao Liu, Yung-Hsiang Lan, Wen-Hui Lee, Kung-Cheng Lin
  • Publication number: 20210020727
    Abstract: The foldable display panel includes a substrate and a pixel array. The substrate has a surface and display and periphery areas thereon. The periphery area is on at least one side of the display area, and has first and second bonding areas. The first and second bonding areas are at opposite first and second sides of the periphery area, respectively. The first and second bonding areas are spaced apart by a first distance along a first direction. The substrate has a foldable line passing through a center of the display area between the first and the second bonding areas. The first and second sides are on two sides of the foldable line. The pixel array is on the display area and overlaps the foldable line. The pixel array is between the first and second sides and includes sub pixel units arranged in an array.
    Type: Application
    Filed: June 24, 2020
    Publication date: January 21, 2021
    Inventors: Ming-Wei LIN, Pao-Yu HUANG, Wen-Hui LEE
  • Patent number: 9964846
    Abstract: Methods, articles of manufacture and systems for creating new nanoscale two dimensional materials comprising designed arrays of lateral or vertical heterojunctions may be fabricated by first lithographically masking a 2D material. Exposed, or unmasked, regions of the 2D material may be converted to a different composition of matter to form lateral or vertical heterojunctions according to the patterned mask. PLD and high kinetic energy impingement of atoms may replace or add atoms in the exposed regions, and a plurality of the exposed regions may be converted concurrently. The process may be repeated one or more times on either side of the same 2D material to form any suitable combination of lateral heterojunctions and/or vertical heterojunctions, comprising semiconductors, metals or insulators or any suitable combination thereof. Furthermore, the resulting 2D material may comprise p-n, n-n, p-p, n-p-n and p-n-p junctions, or any suitable combination thereof.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: May 8, 2018
    Assignee: UT Battelle, LLC
    Inventors: David B. Geohegan, Christopher M. Rouleau, Kai Wang, Kai Xiao, Ming-Wei Lin, Alexander A. Puretzky, Masoud Mahjouri-Samani
  • Publication number: 20170025505
    Abstract: Methods, articles of manufacture and systems for creating new nanoscale two dimensional materials comprising designed arrays of lateral or vertical heterojunctions may be fabricated by first lithographically masking a 2D material. Exposed, or unmasked, regions of the 2D material may be converted to a different composition of matter to form lateral or vertical heterojunctions according to the patterned mask. PLD and high kinetic energy impingement of atoms may replace or add atoms in the exposed regions, and a plurality of the exposed regions may be converted concurrently. The process may be repeated one or more times on either side of the same 2D material to form any suitable combination of lateral heterojunctions and/or vertical heterojunctions, comprising semiconductors, metals or insulators or any suitable combination thereof. Furthermore, the resulting 2D material may comprise p-n, n-n, p-p, n-p-n and p-n-p junctions, or any suitable combination thereof.
    Type: Application
    Filed: July 20, 2016
    Publication date: January 26, 2017
    Inventors: David B. Geohegan, Christopher M. Rouleau, Kai Wang, Kai Xiao, Ming-Wei Lin, Alexander A. Puretzky, Masoud Mahjouri-Samani
  • Publication number: 20150234420
    Abstract: A clock switching circuit for an analog-to-digital converter includes a plurality of clock sources for generating a plurality of clock signals, a plurality of fail-detecting units, coupled to the plurality of clock sources, for generating a plurality of detecting results, and a priority selecting and switching circuit, for selecting and switching one of the plurality of the clock sources as an input clock of the analog-to-digital according to the plurality of detecting results.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: ENERGY PASS INCORPORATION
    Inventor: Ming-Wei Lin
  • Publication number: 20150231987
    Abstract: An adjustment module for an analog to digital converter (ADC) of a battery management system (BMS) includes a detection unit, for detecting a slop of an input current, to generate a sampling control signal; and a sampling frequency adjustment unit, for adjusting a sampling frequency of the ADC according to the sampling control signal.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: Energy Pass Incorporation
    Inventor: Ming-Wei Lin
  • Publication number: 20150234028
    Abstract: A state of charge (SOC) gauge device for a battery includes a voltage variation detection unit, for detecting whether a variation of a battery voltage of the battery reaches a predefined threshold, to generate a detection result; and a coulometer, for calibrating a SOC of the battery according to the detection result.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: Energy Pass Incorporation
    Inventor: Ming-Wei Lin
  • Patent number: 9007067
    Abstract: A battery condition estimating apparatus for a battery pack having a plurality of battery cells connected in series includes an analog channel switching circuit and a battery gas gauge circuit. The analog channel switching circuit has a plurality of input ports and an output port, wherein the input ports are coupled to the battery cells via a plurality of analog channels, respectively, and the analog channel switching circuit is arranged to couple the output port to a selected input port of the input ports for allowing the output port N5 to be coupled to a selected battery via a selected analog channel. The battery gas gauge circuit is coupled to the output port of the analog channel switching circuit, and used for estimating a battery condition of the battery pack by monitoring the selected battery cell via the selected analog channel.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: April 14, 2015
    Assignee: Energy Pass Incorporation
    Inventors: Ming-Wei Lin, Ming-Hsien Lee, Ching-Liang Lin
  • Patent number: 8912769
    Abstract: A current mode buck-boost converter has an input terminal, an output terminal, and an output capacitor coupled to the output terminal. The input terminal is used to receive an input voltage, and the output terminal is for producing the output voltage. The current mode buck-boost converter comprises a voltage converter and a control circuit. The voltage converter comprises an inductor. The control circuit is for detecting the current passing through the inductor to determine the electric energy transmitted to the output terminal by the voltage converter. Accordingly, the current mode buck-boost converter has fast response, and the electrical energy can be recycled and stored to the voltage source when the current mode buck-boost converter operates in down-tracking process.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: December 16, 2014
    Assignee: Energy Pass, Inc.
    Inventors: Ming-Wei Lin, Robert Yung-His Tsu, Ching Long Lin, Ke-Horng Chen, Yu-Huei Lee, Shih-Wei Wang, Wei-Chan Wu, Ping-Ching Huang
  • Publication number: 20140084895
    Abstract: A method for performing refreshing control of a direct current (DC)-to-DC converter includes: monitoring at least one duration of a control signal of a switching unit of the DC-to-DC converter to determine a statistics result, the duration corresponding to a duty cycle of the control signal; and based upon the statistics result, performing refreshing control on a bootstrap capacitor within the DC-to-DC converter. In particular, the step of monitoring the duration of the control signal of the switching unit of the DC-to-DC converter to determine the statistics result further includes monitoring whether a length of the duration falls within a predetermined range, wherein the statistics result represents a number of times that the length of the duration falls within the predetermined range. For example, the statistics result represents the number of times that the length of the duration successively falls within the predetermined range. An associated apparatus is also provided.
    Type: Application
    Filed: September 26, 2012
    Publication date: March 27, 2014
    Applicant: ENERGY PASS INCORPORATION
    Inventors: Ming-Wei Lin, Chao-Hsuan Liu
  • Publication number: 20140062494
    Abstract: A battery condition estimating apparatus for a battery pack having a plurality of battery cells connected in series includes an analog channel switching circuit and a battery gas gauge circuit. The analog channel switching circuit has a plurality of input ports and an output port, wherein the input ports are coupled to the battery cells via a plurality of analog channels, respectively, and the analog channel switching circuit is arranged to couple the output port to a selected input port of the input ports for allowing the output port N5 to be coupled to a selected battery via a selected analog channel. The battery gas gauge circuit is coupled to the output port of the analog channel switching circuit, and used for estimating a battery condition of the battery pack by monitoring the selected battery cell via the selected analog channel.
    Type: Application
    Filed: August 28, 2012
    Publication date: March 6, 2014
    Inventors: Ming-Wei Lin, Ming-Hsien Lee, Ching-Liang Lin
  • Publication number: 20120274295
    Abstract: A current mode buck-boost converter has an input terminal, an output terminal, and an output capacitor coupled to the output terminal. The input terminal is used to receive an input voltage, and the output terminal is for producing the output voltage. The current mode buck-boost converter comprises a voltage converter and a control circuit. The voltage converter comprises an inductor. The control circuit is for detecting the current passing through the inductor to determine the electric energy transmitted to the output terminal by the voltage converter. Accordingly, the current mode buck-boost converter has fast response, and the electrical energy can be recycled and stored to the voltage source when the current mode buck-boost converter operates in down-tracking process.
    Type: Application
    Filed: January 20, 2012
    Publication date: November 1, 2012
    Applicant: ENERGY PASS, INC.
    Inventors: MING-WEI LIN, ROBERT YUNG-HIS TSU, CHING LONG LIN, KE-HORNG CHEN, YU-HUEI LEE, SHIH-WEI WANG, WEI-CHAN WU, PING-CHING HUANG
  • Patent number: 7544281
    Abstract: An electrochemical plating apparatus and method for facilitating uniform current distribution across a wafer during loading into an ECP (electrochemical plating) apparatus is disclosed. The apparatus includes a bath container for containing a bath solution, an anode provided in the bath container, a cathode ring for supporting a wafer in the bath container and a current source electrically connected to the anode and the cathode ring. According to the method, a voltage potential is applied to the cathode ring as it is immersed into the solution and prior to immersion of the wafer in the solution, thereby facilitating a substantially uniform plating current across the wafer upon immersion of the wafer.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: June 9, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Wei Lin, Ming-Hsing Tsai
  • Publication number: 20060243596
    Abstract: An electrochemical plating apparatus and method for facilitating uniform current distribution across a wafer during loading into an ECP (electrochemical plating) apparatus is disclosed. The apparatus includes a bath container for containing a bath solution, an anode provided in the bath container, a cathode ring for supporting a wafer in the bath container and a current source electrically connected to the anode and the cathode ring. According to the method, a voltage potential is applied to the cathode ring as it is immersed into the solution and prior to immersion of the wafer in the solution, thereby facilitating a substantially uniform plating current across the wafer upon immersion of the wafer.
    Type: Application
    Filed: April 28, 2005
    Publication date: November 2, 2006
    Inventors: Ming-Wei Lin, Ming-Hsing Tsai
  • Publication number: 20060189127
    Abstract: Narrow trenches in a substrate tend to fill more rapidly than wide trenches This results in a non-planar surface once all trenches have been filled. The present invention solves this problem by performing the electro-deposition in two steps. The plating bath used during the first step, is optimized for filling narrow trenches while the plating bath used during the second step, is optimized for filling wide trenches. The net result is a final layer having a planar surface, with all trenches being properly filled.
    Type: Application
    Filed: April 24, 2006
    Publication date: August 24, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chou, Ming-Hsing Tsai, Ming-Wei Lin