Patents by Inventor Ming Xiang Li

Ming Xiang Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11404464
    Abstract: An image sensing device is provided. The image sensing device includes a substrate, a plurality of photosensitive elements, a dielectric layer, a reflector, a color filter, and a microlens structure. The substrate has a first pixel and a second pixel adjacent to the first pixel, and the substrate has a front side and a back side opposite the front side. The photosensitive elements are disposed in the substrate. The dielectric layer is disposed on the back side of the substrate. The reflection is disposed on the front side of the substrate and has a parabolic surface. The color filter layer is disposed on the dielectric layer. The microlens structure is disposed on the color filter layer.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: August 2, 2022
    Assignee: SILICON OPTRONICS, INC.
    Inventors: Bo-Ray Lee, Ming-Xiang Li
  • Publication number: 20210358988
    Abstract: An image sensing device is provided. The image sensing device includes a substrate, a plurality of photosensitive elements, a dielectric layer, a reflector, a color filter, and a microlens structure. The substrate has a first pixel and a second pixel adjacent to the first pixel, and the substrate has a front side and a back side opposite the front side. The photosensitive elements are disposed in the substrate. The dielectric layer is disposed on the back side of the substrate. The reflection is disposed on the front side of the substrate and has a parabolic surface. The color filter layer is disposed on the dielectric layer. The microlens structure is disposed on the color filter layer.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Bo-Ray LEE, Ming-Xiang LI
  • Publication number: 20210111201
    Abstract: An image sensor structure including: a substrate, having a first conductive type; a first well region and a second well region disposed in the substrate and spaced apart; an isolation region disposed in the first well region; a gate disposed on the substrate and between the first well region and the second well region; and a pinned photodiode disposed in the substrate and between the first well region and the second well region is provided. The pinned photodiode includes: a first doping region disposed in the substrate and having a first doping concentration and the first conductive type; and a second doping region disposed on the first doping region and having a second doping concentration opposite to the first conductive type. One or both of the first doping region and the second doping region is non-uniform and the first doping concentration is greater than the second doping concentration.
    Type: Application
    Filed: May 14, 2020
    Publication date: April 15, 2021
    Inventors: Ming-Xiang LI, Bo-Ray LEE, Yu-Yuan YAO
  • Patent number: 9425150
    Abstract: An interconnect structure and a method of forming the interconnect structure are provided. Two wafers (and/or dies) are bonded together. A multi-via interconnect structure is formed extending from a backside of a first substrate to interconnect structures in the metallization layers on the first integrated circuit and the second integrated circuit. The multi-via interconnect structure may be formed by thinning a first substrate of a first wafer and forming a first opening through the first substrate. A second opening extends from the first opening to a first interconnect structure on the first wafer, and a third opening extends from the first interconnect structure on the first wafer to a second interconnect structure on the second wafer. The first, second, and third openings are filled with a conductive material, thereby forming a multi-via interconnect structure.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Fei Huang, Ming Xiang Li, Edward Wan, Jacob Chen, Dun-Nian Yaung, Cheng-Eng Daniel Chen
  • Publication number: 20150228584
    Abstract: An interconnect structure and a method of forming the interconnect structure are provided. Two wafers (and/or dies) are bonded together. A multi-via interconnect structure is formed extending from a backside of a first substrate to interconnect structures in the metallization layers on the first integrated circuit and the second integrated circuit. The multi-via interconnect structure may be formed by thinning a first substrate of a first wafer and forming a first opening through the first substrate. A second opening extends from the first opening to a first interconnect structure on the first wafer, and a third opening extends from the first interconnect structure on the first wafer to a second interconnect structure on the second wafer. The first, second, and third openings are filled with a conductive material, thereby forming a multi-via interconnect structure.
    Type: Application
    Filed: April 21, 2014
    Publication date: August 13, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Fei Huang, Ming Xiang Li, Edward Wan, Jacob Chen, Dun-Nian Yaung, Cheng-Eng Daniel Chen
  • Patent number: 8022446
    Abstract: A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first conductivity type in the first well region, wherein the first heavily doped region is horizontally spaced apart from the metal-containing layer.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: September 20, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Hua Huang, Kuo-Ming Wu, Yi-Chun Lin, Ming Xiang Li
  • Publication number: 20090020826
    Abstract: A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first conductivity type in the first well region, wherein the first heavily doped region is horizontally spaced apart from the metal-containing layer.
    Type: Application
    Filed: July 16, 2007
    Publication date: January 22, 2009
    Inventors: Wan-Hua Huang, Kuo-Ming Wu, Yi-Chun Lin, Ming Xiang Li