Patents by Inventor Ming-Yih Duh

Ming-Yih Duh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7689732
    Abstract: The invention provides a method improving flexibility of at least one direct memory access (DMA) channel. The at least one DMA channel is used by a plurality of DMA engines of a first device to direct data transmission between the plurality of DMA engines of the first device and a second device. An explanatory embodiment of the method comprises: allowing any of a plurality of DMA engines to use any of the at least one DMA channels, and enabling some of the plurality of DMA engines to share a target channel if some of the plurality of DMA engines simultaneously compete for the target channel, one of the at least one DMA channel.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: March 30, 2010
    Assignee: Via Technologies, Inc.
    Inventors: Kuo-Ching Chen, Tai-Cheng Chen, Ming-Yih Duh, Li-Hsiang Wang
  • Publication number: 20070204073
    Abstract: The invention provides a method improving flexibility of at least one direct memory access (DMA) channel. The at least one DMA channel is used by a plurality of DMA engines of a first device to direct data transmission between the plurality of DMA engines of the first device and a second device. An explanatory embodiment of the method comprises: allowing any of a plurality of DMA engines to use any of the at least one DMA channels, and enabling some of the plurality of DMA engines to share a target channel if some of the plurality of DMA engines simultaneously compete for the target channel, one of the at least one DMA channel.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventors: Kuo-Ching Chen, Tai-Cheng Chen, Ming-Yih Duh, Li-Hsiang Wang
  • Patent number: 6580412
    Abstract: A signal display apparatus has a plurality of shift registers and a selecting circuit. The shift registers receives a first clock and the selecting circuit receives a selecting signal from a data flow according to a second clock, and output enabling signals to the shift registers according to the selecting signal. The shift registers selectively store data in the data flow according to the first clock in response to the enabling signals. The signal display apparatus and the method for storing data are capable of reducing the transfer time for a serial data single series signal to overcome the prior art shortcomings.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: June 17, 2003
    Assignee: VIA Technologies Inc.
    Inventors: Yen-Shan Lin, Da-Cheng Sung, Ming-Yih Duh
  • Publication number: 20020190967
    Abstract: A signal display apparatus has a plurality of shift registers and a selecting circuit. The shift registers receives a first clock and the selecting circuit receives a selecting signal from a data flow according to a second clock, and output enabling signals to the shift registers according to the selecting signal. The shift registers selectively store data in the data flow according to the first clock in response to the enabling signals. The signal display apparatus and the method for storing data are capable of reducing the transfer time for a serial data single series signal to overcome the prior art shortcomings.
    Type: Application
    Filed: March 6, 2002
    Publication date: December 19, 2002
    Inventors: Yen-Shan Lin, Da-Cheng Sung, Ming-Yih Duh