Abstract: A terminal device and a terminal device installation method are provided. The terminal device includes a machine body, a detachable cover with two side walls, and at least two coupling mechanisms arranged symmetrically. The machine body includes a front board, a rear board opposite to the front board, and two side boards connected between the front board and the rear board. Each coupling mechanism includes a coupling portion located at one side wall, a front track and a rear track respectively having a front opening and a rear opening opposite to the front opening and both located at one side board. As each coupling portion is coupled to each front track, the cover is assembled with the machine body and covers the front board, and as each coupling portion is coupled with each rear track, the cover is assembled to the machine body and covers the rear board.

Abstract: A bracket and a terminal equipment are provided. The bracket is provided for a terminal device to be installed thereon and includes a bracket body, two installing elements, and at least one holding element. The two installing elements respectively protrude outward from two sides of the bracket body, and each of the two installing elements includes an engaging portion. The two installing elements are configured to be inserted into the terminal device so the terminal device is installed on the bracket, and each of the engaging portions is configured such that each of the installing elements is engaged with and retained in the terminal device. The holding element protrudes outward from the bracket body and is configured to be inserted into a loading hole of the terminal device.

Abstract: A battery module includes an insulating base, a pair of electrodes and multiple battery packs. Each electrode is installed to the insulating base and has a bridge portion and a wire connecting part exposed from the insulating base, and a pair of lugs is extended smoothly from each battery pack, and an end of at least a part of the lugs is attached to each bridge portion correspondingly. Therefore, the lug is not being twisted or deformed easily, and the battery module may have good conductive efficiency, long service life, and convenience of changing the battery pack.

Abstract: An imaging lens assembly module includes a lens barrel, a catadioptric lens assembly, an imaging lens assembly, a first fixing element and a second fixing element. The lens barrel has a first relying surface and a second relying surface, which face towards an object side of the imaging lens assembly module. The catadioptric lens assembly relies on the first relying surface. The imaging lens assembly is disposed on an image side of the catadioptric lens assembly, and relies on the second relying surface. The first fixing element is for fixing the catadioptric lens assembly to the lens barrel. The second fixing element is for fixing the imaging lens assembly to the lens barrel. The catadioptric lens assembly is for processing at least twice internal reflections of an image light in the imaging lens assembly module, and for providing optical refractive power.

Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.

Abstract: A capacitive ultrasonic transducer device includes a substrate, a first capacitive structure, a second capacitive structure, a first film structure and a second film structure. The first capacitive structure is disposed on the substrate, and includes a first electrode and a second electrode. A first gap and a dielectric layer are located between the first electrode and the second electrode. The second capacitive structure is disposed on the substrate, and includes a third electrode and a fourth electrode. A second gap is located between the third electrode and the fourth electrode. The first film structure is configured to seal the first gap. The second film structure is connected to the third electrode and the fourth electrode, and configured to seal the second gap. A first width between the first electrode and the second electrode is different from a second width of the second gap.

Abstract: A power consumption control device applied to an electronic device includes an image signal processor (ISP), a storage device, a processing circuit, and a control circuit. The ISP is arranged to receive an image signal captured by a camera of the electronic device, and process the image signal to generate a processed image signal. The storage device is arranged to store at least one predetermined image class. The processing circuit is arranged to analyze the processed image signal to detect whether the processed image signal belongs to the at least one predetermined image class to generate a control signal. The control circuit is arranged to switch a mode of the electronic device to a first mode or a second mode according to the control signal, wherein power consumption and performance of the electronic device in the first mode are lower than that in the second mode.

Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.

Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.

Abstract: A fluid immersion cooling system has a fluid tank containing a hydrocarbon dielectric fluid as a coolant fluid. One or more components of an electronic system is immersed in the coolant fluid. A gas cylinder contains a non-flammable, compressed filling gas. The temperature of the coolant fluid is monitored during operation of the electronic system. The filling gas is released from the gas cylinder and into the fluid tank when the temperature of the coolant fluid rises to a trigger temperature that is set based on the flash point of the coolant fluid. The filling gas covers a surface of the coolant fluid to block oxygen from interacting with vapors of the coolant fluid to prevent combustion.

Abstract: A headset with ambient sound aware function may include at least one microphone (MIC), a storage device, and a processing circuit. The at least one MIC may be arranged to pick up an ambient sound. The storage device may be arranged to store at least one predetermined sound class. The processing circuit may be arranged to receive the ambient sound sent by the at least one MIC, and analyze the ambient sound to detect whether the ambient sound belongs to the at least one predetermined sound class.

Abstract: An analog circuit is calibrated to perform neural network computing. Calibration input is provided to a pre-trained neural network that includes at least a given layer having pre-trained weights stored in the analog circuit. The analog circuit performs tensor operations of the given layer using the pre-trained weights. Statistics of calibration output from the analog circuit is calculated. Normalization operations to be performed during neural network inference are determined. The normalization operations incorporate the statistics of the calibration output and are performed at a normalization layer that follows the given layer. A configuration of the normalization operations is written into memory while the pre-trained weights stay unchanged.

Abstract: An alignment mark pattern is provided. The alignment mark pattern includes a first region that includes a first line and a first space having different widths therebetween, a second region that includes a second line and a second space having different widths therebetween, a third region that includes a third line and a third space having different widths therebetween, and a fourth region that includes a fourth line and a fourth space having different widths therebetween. The first and second lines extend in a first direction. The third and fourth lines extend in a second direction perpendicular to the first direction. The first region is diagonal to the second region. The third region is diagonal to the fourth region. The third region is adjacent to the first and second regions. The fourth region is adjacent to the first and second regions.

Abstract: An alignment mark pattern is provided. The alignment mark pattern includes a first region that includes a first line and a first space having different widths therebetween, a second region that includes a second line and a second space having different widths therebetween, a third region that includes a third line and a third space having different widths therebetween, and a fourth region that includes a fourth line and a fourth space having different widths therebetween. The first and second lines extend in a first direction. The third and fourth lines extend in a second direction perpendicular to the first direction. The first region is diagonal to the second region. The third region is diagonal to the fourth region. The third region is adjacent to the first and second regions. The fourth region is adjacent to the first and second regions.

Abstract: Systems and methods for multi-spectral ultrasonic imaging are disclosed. In one embodiment, a finger is scanned at a plurality of ultrasonic scan frequencies. Each scan frequency provides an image information set describing a plurality of pixels of the finger including a signal-strength indicating an amount of energy reflected from a surface of a platen on which a finger is provided. For each of the pixels, the pixel output value corresponding to each of the scan frequencies is combined to produce a combined pixel out put value for each pixel. Systems and methods for improving the data capture of multi-spectral ultrasonic imaging are also disclosed.