Patents by Inventor Ming-Yu Tseng

Ming-Yu Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178102
    Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 30, 2024
    Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
  • Patent number: 11977745
    Abstract: A data retry-read method, a memory storage device, and a memory control circuit element are provided. The method includes: detecting a notification signal from a volatile memory module; in response to the notification signal, instructing the volatile memory module to execute N command sequences in a buffer; and after the volatile memory module executes the N command sequences, sending at least one read command sequence, according to M physical addresses involved in the N command sequences, to instruct the volatile memory module to read first data from the M physical addresses.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: May 7, 2024
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Ming-Hui Tseng, Chia-Lung Ma, Zhen-Yu Weng
  • Publication number: 20240120854
    Abstract: A triboelectric nanogenerating device is configured for providing an electric power to an electronic device and the triboelectric nanogenerating device includes at least one scaly triboelectric membrane configured for providing the electric power to the electronic device by frictional electrification. The at least one scaly triboelectric membrane includes a keratin and a polyvinyl alcohol, the at least one scaly triboelectric membrane has a first triboelectric surface, and the first triboelectric surface of the at least one scaly triboelectric membrane includes a plurality of scaly layers. Each of the scaly layers is arranged in order and extends along an orienting direction. A distal end of each of the scaly layers has a plurality of saw-tooth structures.
    Type: Application
    Filed: February 6, 2023
    Publication date: April 11, 2024
    Inventors: Zong-Hong Lin, Ming-Zheng Huang, Hsuan-Yu Yeh, An-Rong Chen, Yao-Hsuan Tseng
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Patent number: 11937266
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: March 19, 2024
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Publication number: 20140187233
    Abstract: A watch type mobile terminal capable of being worn on a user's wrist is provided. The watch type mobile terminal includes a case, a circuit board, a first connector, a band, a receiver and a first flexible printed circuit (FPC) board. The circuit board is disposed in the case. The first connector is disposed on the circuit board. The band is connected to the case, whereby the watch type mobile terminal is capable of being worn on the user's wrist, and the band has a first end and a second end opposite to the first end. The receiver is disposed at the first end. The first FPC board is disposed in the band and connected between the first connector and the receiver.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: COMPAL COMMUNICATIONS, INC.
    Inventors: Yung-Hsiang Chen, Chang-Hua Wei, Wei-Chih Hsu, Shi-Kuan Chen, Chuan-Hao Wen, Ming-Yu Tseng, Po-Yi Wu, Yi-Chen Lin, Yi-Chu Hsu, Chih-Hsiang Fang, Pang-Ruei Huang, Lien-Chih Tsai, Yen-Hui Li, Yung-Ching Tien
  • Patent number: D673556
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: January 1, 2013
    Assignee: Compal Electronics, Inc.
    Inventors: Ming-Yu Tseng, Yung-Hsiang Chen, Hsin Lu, Hui-Jou Tsai, Pei-Jen Lin, Chuan-Hao Wen, I-Wen Chen, Hsiang-Ling Liu