Patents by Inventor Ming-Ze LIN

Ming-Ze LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package device and method of manufacturing the same
    Patent number: 11956897
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20220361326
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING
  • Semiconductor package device
    Patent number: 11399429
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: July 26, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200296827
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 17, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING
  • Semiconductor package device and method of manufacturing the same
    Patent number: 10687419
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: June 16, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20180359853
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING