Patents by Inventor Ming

Ming has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9298307
    Abstract: A touch display apparatus is disclosed in the disclosure. The touch display apparatus includes a panel module, a display driving circuit and a touch sensing circuit. The panel module includes pixel units, common electrode lines and a touch receiving line. The common electrode lines are disposed vertical to the touch response lines. The display driving circuit is coupled to the panel module to drive the pixel units. The display driving circuit is synchronized to the touch sensing circuit. The touch transmission signal for touch-sensing is transmitted via the common electrode line sequentially. In addition, a display-driving method is also disclosed.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: March 29, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yu-Ta Chen, Chao-Chen Wang, Shing-Ming Tai, Chao-Chuan Chen
  • Patent number: 9301174
    Abstract: A method and system are provided for scheduling data transmission in a Multiple-Input Multiple-Output (MIMO) system. The MIMO system may comprise at least one MIMO transmitter and at least one MIMO receiver. Feedback from one or more receivers may be used by a transmitter to improve quality, capacity, and scheduling in MIMO communication systems. The method may include generating or receiving information pertaining to a MIMO channel metric and information pertaining to a Channel Quality Indicator (CQI) in respect of a transmitted signal; and sending a next transmission to a receiver using a MIMO mode selected in accordance with the information pertaining to the MIMO channel metric, and an adaptive coding and modulation selected in accordance with the information pertaining to the CQI.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: March 29, 2016
    Assignee: BlackBerry Limited
    Inventors: Wen Tong, Ming Jia, Jianming Wu, Dong-Sheng Yu, Peiying Zhu
  • Patent number: 9299740
    Abstract: A CMOS image sensor and a method of forming are provided. The CMOS image sensor may include a device wafer. A conductive feature may be formed on a back-side surface of the device wafer. The device wafer may include a pixel formed therein. A passivation layer may be formed over the back-side surface of the device wafer and the conductive feature. A grid film may be formed over the passivation layer. The grid film may be patterned to accommodate a color filter. The grid film pattern may align the color filter to corresponding pixel in the device wafer. A portion of the grid film formed over the conductive feature may be reduced to be substantially planar with portions of the grid film adjacent to the conductive feature. The patterning and reducing may be performed according to etching processes, chemical mechanical processes, and combinations thereof.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: March 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsien Tseng, Nai-Wen Cheng, Shou-Gwo Wuu, Ming-Tsong Wang, Tung-Ting Wu
  • Patent number: 9299624
    Abstract: A stacked semiconductor structure and a manufacturing method for the same are provided. The stacked semiconductor structure is provided, which comprises a first semiconductor substrate, a second semiconductor substrate, a dielectric layer, a trench, a via, and a conductive structure. The first semiconductor substrate comprises a first substrate portion and a first conductive layer on an active surface of the first substrate portion. The second semiconductor substrate comprises a second substrate portion and a second conductive layer on an active surface of the second substrate portion. The trench passes through the second substrate portion and exposing the second conductive layer. The via passes through the dielectric layer and exposes the first conductive layer. The conductive structure has an upper portion filling the trench and a lower portion filling the via. Opposing side surfaces of the upper portion are beyond opposing side surfaces of the lower portion.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: March 29, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsin-Ming Hou, Ji-Fu Kung
  • Patent number: 9298228
    Abstract: A computing system having a memory riser sub-system. The computing system includes a motherboard with a memory module connector and a riser card inserted into the first memory module connector. A first mezzanine card is connected to the riser card. The first mezzanine card includes a first mezzanine memory module connector for a first memory module and a second mezzanine memory module connector for a second memory module. A memory channel electrically connects the memory controller to the first mezzanine memory module connector and the second mezzanine module connector via the motherboard, the first riser card and the first mezzanine card. The memory channel may be divided into a first data sub-channel connected to the first mezzanine memory module connector and a second data sub-channel connected to the second mezzanine memory module connector.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: March 29, 2016
    Assignee: Rambus Inc.
    Inventors: Abhijit M. Abhyankar, Ravindranath Kollipara, Thomas J. Giovannini, Ming Li, David A. Secker, Arun Vaidyanath, Donald R. Mullen, Adrian F. Torres
  • Patent number: 9297857
    Abstract: A membrane switch circuit testing system includes a testing module and a connection element. After the connection element is connected with a membrane switch circuit and the testing module, the testing module assigns an identification code to a key intersection of the membrane switch circuit. When the key intersection is depressed, an equivalent circuit is defined by the depressed key intersection and a corresponding fixed resistor of the testing module. Moreover, the testing module acquires an intersection resistance value of the depressed key intersection from the equivalent circuit. Consequently, the testing module judges whether the depressed key intersection is qualified according to the intersection resistance value.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 29, 2016
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventor: Pei-Ming Chang
  • Patent number: 9301100
    Abstract: An indoor positioning system and method that correlates map locations to respective wireless access point (AP) fingerprints, and wherein each wireless AP fingerprint is a plurality of wireless AP signal measurements associated with the correlated map location. The method includes receiving position-inference data associated with a user; determining a probable location inside the building based on the position-inference data; receiving wireless AP signal measurements detected by a wireless device associated with the user; associating the probable location with the wireless device based on the association between the position-inference data and the user of the wireless device; and updating the wireless AP fingerprint correlated to the probable location using the received wireless AP signal measurements. The method and system use crowd-sourcing to build and refine the wireless AP fingerprints.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: March 29, 2016
    Assignee: BlackBerry Limited
    Inventors: Krishnam Raju Jampani, Daryl Joseph Martin, I-Ming Tsai, Jason Christopher Beckett, Jerry Mailloux
  • Patent number: 9297608
    Abstract: A toy gun comprising: a housing; a plurality of projectile chambers each adapted to house a projectile, each projectile chamber being in fixed relationship with the housing; and a pumping apparatus having a delivery interface alignable with each projectile chamber in a sequence, such that when the delivery interface is aligned with one of the projectile chambers, the pumping apparatus is operable to drive air into said one of the projectile chambers via the delivery interface.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: March 29, 2016
    Assignee: ALEX BRANDS BEE HOLDINGS, LLC
    Inventors: Chor Ming Ma, Brownie Johnson
  • Patent number: 9296362
    Abstract: A windshield wiper (1,1a) with an even pressing force is connected to a driving arm (2) and includes a primary wiper frame (10,10a), two auxiliary wiper frames (20,20a), connecting frames (30,30a), and a wiper blade (40,40a). The primary wiper frame (10,10a) includes a fixing base (11,11a) connected to the driving arm (2). The auxiliary wiper frames (20,20a) are disposed on both ends of the primary wiper frame (10,10a). Each auxiliary wiper frame (20,20a) includes an elastic piece (21,21a) and a pivotal base (22,22a) fixed to the elastic piece (21,21a) and pivotally connected to the primary wiper frame (10,10a). The connecting frames (30,30a) are evenly provided on each auxiliary wiper frame (20). Each connecting frame (30) includes a pressing piece (31,31a) and buckling brackets (32,32a). The wiper blade (40,40a) is disposed through the buckling brackets (32,32a) to be connected below the pressing piece (31,31a).
    Type: Grant
    Filed: December 14, 2014
    Date of Patent: March 29, 2016
    Assignee: DANYANG UPC AUTO PARTS CO., LTD.
    Inventors: Chih-Ming Yang, Chuan-Chih Chang
  • Patent number: 9295684
    Abstract: The present invention relates to a cream composition of glucosamine, including at least 10 wt %-15 wt % of glucosamine HCL, a methylsulfonylmethane component, a chondroitin component, and a cream base, wherein the composition promotes penetration of glucosamine from skin of affected area by synergistic interaction between components, in order to enhance absorption of human body.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: March 29, 2016
    Inventor: Ming-Chen Lee
  • Patent number: 9300220
    Abstract: An uninterruptible power supply system including a rectification circuit, a power calibrating conversion circuit, an inverting conversion circuit, an LC circuit, a first output switch, a second output switch and a relay switch is disclosed. The rectification circuit couples to the main electricity. The power calibrating conversion circuit couples to the rectification circuit, and includes an independent drive unit and a switch unit. The inverting conversion circuit couples to the power calibrating conversion circuit. The LC circuit couples between output neutral terminal and output ground terminal. The first output switch couples between the LC circuit and the inverting conversion circuit. The second output switch couples between the inverting conversion circuit and output live terminal. The relay switch couples between the input neutral terminal and the LC circuit. When the relay switch turns on, the input neutral terminal connects with the output neutral terminal through the LC circuit.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 29, 2016
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: Ming-Hsien Chen, Juor-Ming Hsieh
  • Patent number: 9299085
    Abstract: Methods, systems, and computer programs encoded on a computer storage medium include receiving, from an advertiser, advertisement criteria associated with an advertisement, the advertisement criteria comprising a first set of criteria and a budget and/or a bid, the advertisement criteria to be used in advertisement auctions for which the advertisement is to be considered for display to users performing online actions; determining a number of users for whom the advertisement was a candidate to be shown based on the first set of criteria associated with the advertisement, but to whom the advertisement was not shown based on the budget and/or bid of the advertisement during a particular period of time; and providing, in a report, information relating to the number of users.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: March 29, 2016
    Assignee: Google Inc.
    Inventors: Ming Lei, Renjie Jiang, Kenneth R. Alton, Varun Chirravuri, Russell W. Quong, Abhinay Sharma, Oren E. Zamir, Xing Yu, Zhengzhu Feng
  • Publication number: 20160086901
    Abstract: A package includes first package component, which further includes a first metal trace at a surface of the first package component, with the first metal trace having a trace width measured in a direction perpendicular to a lengthwise direction of the first metal trace. The first package component further includes a second metal trace at the surface of the first package component. The first metal trace and the second metal trace are parallel to each other. A second package component is overlying the first package component, wherein the second package component includes a metal bump. A solder region bonds the metal bump to the first metal trace, wherein the solder region contacts a top surface and sidewalls of the first portion of the first metal trace. A ratio of a volume of the solder region to the trace width is between about 1,100 ?m2 and about 1,300 ?m2.
    Type: Application
    Filed: November 30, 2015
    Publication date: March 24, 2016
    Inventors: Chih-Fan Huang, Chen-Shien Chen, Chung-Shi Liu, Ming-Da Cheng, Tin-Hao Kuo, Yi-Teh Chou
  • Publication number: 20160087817
    Abstract: A circuit includes a summation circuit for receiving an input data signal and a feedback signal including a previous data bit. The summation circuit is configured to output a conditioned input data signal to a clock and data recovery circuit. A first flip-flop is coupled to an output of the summation circuit and is configured to receive a first set of bits of the conditioned input data signal and a first clock signal having a frequency that is less than a frequency at which the input data signal is received by the first summation circuit. A second flip-flop is coupled to the output of the summation circuit and is configured to receive a second set of bits of the conditioned input data signal and a second clock signal having a frequency that is less than the frequency at which the input data signal is received by the first summation circuit.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 24, 2016
    Inventors: Ming-Chieh HUANG, Chan-Hong CHERN, Tao Wen CHUNG, Yuwen SWEI, Chih-Chang LIN, Tsung-Ching HUANG
  • Publication number: 20160087636
    Abstract: A clock generating apparatus and a fractional frequency divider thereof are provided. The fractional frequency divider includes a frequency divider (FD), a plurality of samplers, a selector and a control circuit. An input terminal of the FD is coupled to an output terminal of a multi-phase-frequency generating circuit. Input terminals of the samplers are coupled to an output terminal of the FD. Trigger terminals of the samplers receive the sampling clock signals. The input terminals of the selector are coupled to output terminals of the samplers. An output terminal of the selector is coupled to a feedback terminal of the multi-phase-frequency generating circuit. The control circuit provides a fraction code to a control terminal of the selector, so as to control the selector for selectively coupling the output terminal of one of the samplers to the feedback terminal of the multi-phase-frequency generating circuit.
    Type: Application
    Filed: October 30, 2014
    Publication date: March 24, 2016
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Chia-Liang Lai, Song-Rong Han, Jung-Yu Chang, Wei-Ming Lin
  • Publication number: 20160087106
    Abstract: The present disclosure relates to a structure and method for forming a flash memory cell with an improved erase speed and erase current. Si dots are used for charge trapping and an ONO sandwich structure is formed over the Si dots. Erase operation includes direct tunneling as well as FN tunneling which helps increase erase speed without compensating data retention.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 24, 2016
    Inventors: Chih-Ming Chen, Tsu-Hui Su, Szu-Yu Wang, Chung-Yi Yu
  • Publication number: 20160085144
    Abstract: The present invention relates to an EUV pod having marks, which comprises a mask pod and one or more mark disposed on the mask pod. One or more sensor of a processing machine is used for detecting the one or more mark. By including the one or more mark, the surface roughness of one or more region of the mask pod detectable by the one or more sensor can be altered. The one or more sensor emits light to the mask pod, which reflects the light to the one or more sensor. The one or more sensor receives the reflection light from the mask pod and judges if the voltage generated by the reflection light falls within the reflection ranges of the mark. Thereby, whether the one or more sensor corresponds to the one or more make can be confirmed.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 24, 2016
    Inventors: WEI-YEN CHEN, CHENG-JU LEE, LONG-MING LU, CHENG-HSIN CHEN, TIEN-JUI LIN
  • Publication number: 20160086843
    Abstract: Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited to cover the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removed by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate is selectively removed.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Shing Chen, Yu-Ting Wang, Ming-Hui Chang
  • Publication number: 20160081423
    Abstract: A shoe includes a sole, an actuator and a transducer. The actuator is mounted on one side of the sole. The transducer is mounted within the sole and includes a micro-motor, a link structure and a heater. The link structure is positioned between the micro-motor and the actuator and configured to move the micro-motor to generate electric energy. The heater is electrically coupled to the micro-motor and configured to convert the electric energy provided by the micro-motor to heat. When the actuator deforms or restores its deformation, the link structure moves thereby enabling the micro-motor to generate electric energy for the heater.
    Type: Application
    Filed: December 23, 2014
    Publication date: March 24, 2016
    Inventor: JIAN-MING XIAO
  • Publication number: 20160083037
    Abstract: A frame structure for a bicycle includes a head tube, a support tube assembly and a seat tube. The support tube assembly connects the head tube and the seat tube and includes two top tubes, one down tube and two reinforced tubes.
    Type: Application
    Filed: June 2, 2015
    Publication date: March 24, 2016
    Inventor: Ming-En CHOU