Abstract: The present disclosure relates to the field of touch display technologies, and provides an array substrate, a manufacturing method thereof, a touch display panel and a touch display device. The array substrate includes a base substrate, and a plurality of thin film transistors, an insulating planarization layer, a plurality of pixel electrodes, a plurality of touch electrodes and a plurality of common electrodes formed sequentially on the base substrate. The insulating planarization layer has a plurality of vias exposing a drain of each thin film transistor respectively. Each pixel electrode is connected to a drain of a corresponding thin film transistor through a via in the insulating planarization layer, and each common electrode is connected to a corresponding touch electrode.

Abstract: An array substrate, a display panel, a display device, and driving methods thereof are provided. The array substrate includes subpixels arranged in an array, and switches. The subpixels include subpixels of a first color, subpixels of a second color, subpixels of a third color, subpixels of a fourth color, in odd rows of subpixels, the subpixels of the first color, the subpixels of the second color, the subpixels of the third color, the subpixels of the fourth color are sequentially arranged; in even rows of subpixels, the subpixels of the third color, the subpixels of the fourth color, the subpixels of the first color, the subpixels of the second color are sequentially arranged; and the subpixels of the first color are white subpixels; the subpixels of the second color are blue subpixels; the subpixels of the third color are green subpixels; the subpixels of the fourth color are red subpixels.

Abstract: A shift register and a driving method thereof, a gate driving circuit and a display apparatus are disclosed. The shift register includes an input circuit, a pull-up node charging circuit and an output circuit. The pull-up node charging circuit is connected with a first voltage terminal, a second voltage terminal, the input circuit and a pull-up node, and is configured to charge the pull-up node and maintain a level of the pull-up node under control of the first input signal.

Abstract: The present disclosure relates to the field of touch display technologies, and provides an array substrate, a manufacturing method thereof, a touch display panel and a touch display device. The array substrate includes a base substrate, and a plurality of thin film transistors, an insulating planarization layer, a plurality of pixel electrodes, a plurality of touch electrodes and a plurality of common electrodes formed sequentially on the base substrate. The insulating planarization layer has a plurality of vias exposing a drain of each thin film transistor respectively. Each pixel electrode is connected to a drain of a corresponding thin film transistor through a via in the insulating planarization layer, and each common electrode is connected to a corresponding touch electrode.

Abstract: A shift register and a driving method thereof, a gate driving circuit and a display apparatus are disclosed. The shift register includes an input circuit, a pull-up node charging circuit and an output circuit. The pull-up node charging circuit is connected with a first voltage terminal, a second voltage terminal, the input circuit and a pull-up node, and is configured to charge the pull-up node and maintain a level of the pull-up node under control of the first input signal.

Abstract: An array substrate, a display panel, a display device, and driving methods thereof are provided. The array substrate includes subpixels arranged in an array, and switches. The subpixels include subpixels of a first color, subpixels of a second color, subpixels of a third color, subpixels of a fourth color, in odd rows of subpixels, the subpixels of the first color, the subpixels of the second color, the subpixels of the third color, the subpixels of the fourth color are sequentially arranged; in even rows of subpixels, the subpixels of the third color, the subpixels of the fourth color, the subpixels of the first color, the subpixels of the second color are sequentially arranged; and the subpixels of the first color are white subpixels; the subpixels of the second color are blue subpixels; the subpixels of the third color are green subpixels; the subpixels of the fourth color are red subpixels.

Abstract: A pixel arrangement structure includes a plurality of pixel repeating units arranged in a matrix in a row direction and a column direction. Each of the plurality of pixel repeating units includes a first pixel unit and a second pixel unit sequentially arranged in the column direction. The first pixel unit includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel which are sequentially arranged in the row direction. The second pixel unit includes a third sub-pixel, a fourth sub-pixel, a first sub-pixel, and a second sub-pixel which are sequentially arranged in the row direction. Each column of sub-pixels is divided into a first subset of sub-pixels connected to a first data line and a second subset of sub-pixels connected to a second data line.

Abstract: The present disclosure provides a shift register unit whose operating time includes a plurality of multi-frame periods, each of the multi-frame periods including a plurality of frame periods. The shift register unit includes a trigger signal input terminal, an input module, a pull-up module, a pull-down control module, a plurality of pull-down modules, and a signal output terminal. The pull-down control module is configured to sequentially provide active signals to the control terminals of respective pull-down modules in pull-down stages of respective frame periods of one multi-frame period. The present disclosure further provides a shift register, a gate driving circuit and a display panel. The shift register unit has longer lifetime and better electric performance, and can meet the requirements of high-reliability products.

Abstract: An array substrate, a display panel, a display device, and driving methods thereof are provided. The array substrate includes a plurality of subpixels arranged in an array, a plurality of data lines, and a plurality of switches. The plurality of subpixels include subpixels of a first color, subpixels of a second color, subpixels of a third color, and subpixels of a fourth color, in odd rows of subpixels, the subpixels of the first color, the subpixels of the second color, the subpixels of the third color, and the subpixels of the fourth color are sequentially arranged; in even rows of subpixels, the subpixels of the third color, the subpixels of the fourth color, the subpixels of the first color, and the subpixels of the second color are sequentially arranged; and each column of subpixels corresponds to and is connected with a data line.

Abstract: The present disclosure provides a shift register unit whose operating time includes a plurality of multi-frame periods, each of the multi-frame periods including a plurality of frame periods. The shift register unit includes a trigger signal input terminal, an input circuit, a pull-up circuit, a pull-down control circuit, a plurality of pull-down circuits, and a signal output terminal. The pull-down control circuit is configured to sequentially provide active signals to the control terminals of respective pull-down circuits in pull-down stages of respective frame periods of one multi-frame period. The present disclosure further provides a shift register, a gate driving circuit and a display panel.

Abstract: An array substrate includes: thin film transistors disposed on a base substrate; pixel electrodes disposed on a side of the thin film transistors facing away from the base substrate, each pixel electrode being coupled with a drain of a corresponding thin film transistor; common electrodes disposed on a side of the pixel electrodes facing away from the thin film transistors; and touch electrodes disposed on a side of the common electrodes facing away from the pixel electrodes, each touch electrode being coupled with a corresponding common electrode.

Abstract: A pixel arrangement structure includes a plurality of pixel repeating units arranged in a matrix in a row direction and a column direction. Each of the plurality of pixel repeating units includes a first pixel unit and a second pixel unit sequentially arranged in the column direction. The first pixel unit includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel which are sequentially arranged in the row direction. The second pixel unit includes a third sub-pixel, a fourth sub-pixel, a first sub-pixel, and a second sub-pixel which are sequentially arranged in the row direction. Each column of sub-pixels is divided into a first subset of sub-pixels connected to a first data line and a second subset of sub-pixels connected to a second data line.

Abstract: An array substrate, a display panel, a display device, and driving methods thereof are provided. The array substrate includes a plurality of subpixels arranged in an array, a plurality of data lines, and a plurality of switches. The plurality of subpixels include subpixels of a first color, subpixels of a second color, subpixels of a third color, and subpixels of a fourth color, in odd rows of subpixels, the subpixels of the first color, the subpixels of the second color, the subpixels of the third color, and the subpixels of the fourth color are sequentially arranged; in even rows of subpixels, the subpixels of the third color, the subpixels of the fourth color, the subpixels of the first color, and the subpixels of the second color are sequentially arranged; and each column of subpixels corresponds to and is connected with a data line.

Abstract: An array substrate includes: thin film transistors disposed on a base substrate; pixel electrodes disposed on a side of the thin film transistors facing away from the base substrate, each pixel electrode being coupled with a drain of a corresponding thin film transistor; common electrodes disposed on a side of the pixel electrodes facing away from the thin film transistors; and touch electrodes disposed on a side of the common electrodes facing away from the pixel electrodes, each touch electrode being coupled with a corresponding common electrode.

Abstract: A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, an output circuit, a pull-up-node pull-down circuit, a first control circuit, a second control circuit and an output pull-down circuit. The first control circuit is configured to write a fourth clock signal into a first pull-down node and write a first power voltage into a second pull-down node responsive to a first control signal, and to write the first power voltage into the first pull-down node responsive to a voltage of a pull-up node. The second control circuit is configured to write the fourth clock signal into the second pull-down node and write the first power voltage into the first pull-down node responsive to a second control signal, and to write the first power voltage into the second pull-down node responsive to the voltage of the pull-up node.

Abstract: A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, an output circuit, a pull-up-node pull-down circuit, a first control circuit, a second control circuit and an output pull-down circuit. The first control circuit is configured to write a fourth clock signal into a first pull-down node and write a first power voltage into a second pull-down node responsive to a first control signal, and to write the first power voltage into the first pull-down node responsive to a voltage of a pull-up node. The second control circuit is configured to write the fourth clock signal into the second pull-down node and write the first power voltage into the first pull-down node responsive to a second control signal, and to write the first power voltage into the second pull-down node responsive to the voltage of the pull-up node.

Abstract: An array substrate, an in-cell touch screen, and a display device are provided. The array substrate includes: gate lines and data lines crossing each other; an array of pixels defined by the gate lines and the data lines, wherein a pixel electrode arranged in each pixel is connected with the gate line and the data line through a thin film transistor; and a plurality of touch electrodes arranged in an array, each of the touch electrodes being connected with the data line through a via-hole, wherein the touch electrodes are transparent electrodes; and wherein the data line is configured to output either a touch signal or a display signal at a time, wherein the display signal is transmitted to the pixel electrode through the thin film transistor, and the touch signal is transmitted to the touch electrode through the via-hole.

Abstract: Disclosed are a thin film transistor and a method for fabricating the same, where annealing can be performed on a base substrate formed with a metal inductive layer to thereby perform metal induced crystallization so as to fabricate the bottom-gate low-temperature poly-silicon thin film transistor while dispensing with a shielding layer in a top-gate thin film transistor. Furthermore an amorphous-silicon layer can be converted into a poly-silicon layer due to metal induced crystallization, and the patterning process can be further performed on the poly-silicon layer to form a first doped zone corresponding to an active layer, and a second doped zone corresponding to a source and drain area, so that a channel area can be separated from the source and drain area to thereby guarantee the electrical performance of the thin film transistor.