Abstract: A method includes putting a first package component into contact with a second package component. The first package component comprises a first dielectric layer including a first dielectric material, and the first dielectric material is a silicon-oxide-based dielectric material. The second package component includes a second dielectric layer including a second dielectric material different from the first dielectric material. The second dielectric material comprises silicon and an element selected from the group consisting of carbon, nitrogen, and combinations thereof. An annealing process is performed to bond the first dielectric layer to the second dielectric layer.

Abstract: A semiconductor structure, a method for manufacturing a FinFET structure and a method for manufacturing a semiconductor structure are provided. The method for forming a FinFET structure includes: providing a FinFET precursor including a plurality of fins and a plurality of gate trenches between the fins; forming a first portion of the trench dummy of a dummy gate within the plurality of gate trenches; removing at least a part of the first portion of the trench dummy; forming a second portion of the trench dummy over the first portion of the trench dummy; performing a first thermal treatment to the first and second portions of the trench dummy; and forming a blanket dummy of the dummy gate over the second portion of the trench dummy. The present disclosure further provides a FinFET structure with an improved metal gate.

Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.

Abstract: A die stack structure including a first die, an encapsulant, a redistribution layer and a second die is provided. The encapsulant laterally encapsulates the first die. The redistribution layer is disposed below the encapsulant, and electrically connected with the first die. The second die is disposed between the redistribution layer and the first die, wherein the first and second dies are electrically connected with each other, the second die comprises a body portion having a first side surface, a second side surface and a curved side surface therebetween, and the curved side surface connects the first side surface and the second side surface.

Abstract: The present disclosure relates to a semiconductor device including a substrate having a top surface and a gate stack. The gate stack includes a gate dielectric layer on the substrate and a gate electrode on the gate dielectric layer. The semiconductor device also includes a multi-spacer structure. The multi-spacer includes a first spacer formed on a sidewall of the gate stack, a second spacer, and a third spacer. The second spacer includes a first portion formed on a sidewall of the first spacer and a second portion formed on the top surface of the substrate. The second portion of the second spacer has a thickness in a first direction that gradually decreases. The third spacer is formed on the second portion of the second spacer and on the top surface of the substrate. The semiconductor device further includes a source/drain region formed in the substrate, and a portion of the third spacer abuts the source/drain region and the second portion of the second spacer.

Abstract: A semiconductor package including an improved isolation bonding film and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first die bonded to a package substrate, the first die including vias extending through a substrate, the vias extending above a top surface of the substrate; a first dielectric film extending along a top surface of the package substrate, along the top surface of the substrate, and along sidewalls of the first die, the vias extending through the first dielectric film; a second die bonded to the first dielectric film and the vias; and an encapsulant over the package substrate, the first die, the first dielectric film, and the second die.

Abstract: A package includes a first device die, and a second device die bonded to the first device die through hybrid bonding. The second device die is larger than the first device die. A first isolation region encapsulates the first device die therein. The first device die, the second device die, and the first isolation region form parts of a first package. A third device die is bonded to the first package through hybrid bonding. The third device die is larger than the first package. A second isolation region encapsulates the first package therein. The first package, the third device die, and the second isolation region form parts of a second package.

Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.

Abstract: A die stack structure including a first die, an encapsulant, a redistribution layer and a second die is provided. The encapsulant laterally encapsulates the first die. The redistribution layer is disposed below the encapsulant, and electrically connected with the first die. The second die is disposed between the redistribution layer and the first die, wherein the first and second dies are electrically connected with each other, the second die comprises a body portion having a first side surface, a second side surface and a curved side surface therebetween, and the curved side surface connects the first side surface and the second side surface.

Abstract: A method of fabricating a color filter includes steps of forming a transparent-matrix on a flexible and transparent substrate for dividing the substrate to a plurality of pixel regions; printing the a plurality of pixel regions with color ink; and curing the ink to form a plurality of color filters on the surface of the substrate. The light transmittance ability of the color filter can be effectively improved by forming a transparent-matrix instead of a black-matrix on the substrate.

Abstract: An exemplary circuit board includes a plate body and a multilayer capacitor installed on a surface of the plate body. The multilayer capacitor includes a multilayer body and two outer electrodes located at the two opposite ends of the multilayer body. The multilayer body includes a plurality of ceramic layers and a plurality of internal electrodes alternately arranged. The two outer electrodes are connected to the plate body, and a stacking direction of the multilayer body is substantially parallel to the surface of the plate body.

Abstract: An eraser includes a housing (20) having a receiving chamber (21), a collection zone (23) and a plurality of reinforcing ribs (26), a mounting board (30) mounted on the housing, a cleaning member (40) mounted on the mounting board, a support bracket (50) mounted on the housing, a door (60) removably mounted on the housing to cover the collection zone, a hollow separation member (70) mounted in the housing to separate the receiving chamber from the collection zone, and a control valve (80) movable to open the separation member so as to connect the receiving chamber with the collection zone or to close the separation member so as to interrupt a connection between the receiving chamber and the collection zone, and two decorative covers mounted on the housing and each abutting the reinforcing ribs.

Abstract: The present invention discloses a multi-channel multi-media data processing method, comprising the steps of: providing a demodulator circuit and a multi-media processing circuit, the multi-media processing circuit including a DRAM; receiving multi-channel analog signals, and performing analog-to-digital conversion and demodulation on the signals by the demodulator circuit; storing the converted and demodulated multi-channel signals in the DRAM; and reading the signals of at least one channel from the DRAM.

Abstract: An eraser includes a housing (20) having a receiving chamber (21), a collection zone (23) and a plurality of reinforcing ribs (26), a mounting board (30) mounted on the housing, a cleaning member (40) mounted on the mounting board, a support bracket (50) mounted on the housing, a door (60) removably mounted on the housing to cover the collection zone, a hollow separation member (70) mounted in the housing to separate the receiving chamber from the collection zone, and a control valve (80) movable to open the separation member so as to connect the receiving chamber with the collection zone or to close the separation member so as to interrupt a connection between the receiving chamber and the collection zone, and two decorative covers mounted on the housing and each abutting the reinforcing ribs.

Abstract: The present invention discloses a multi-media data processing method for use in an integrated circuit having an error correction circuit, the method comprising the steps of: receiving broadcasted analog data; converting the analog data to digital data; and storing the digital data into a main memory without error correction, wherein the digital data stored in the main memory are subject to error correction only when it is required, but are not subject to error correction if it is not required.

Abstract: The present invention discloses a multi-channel multi-media data processing method, comprising the steps of: providing a demodulator circuit and a multi-media processing circuit, the multi-media processing circuit including a DRAM; receiving multi-channel analog signals, and performing analog-to-digital conversion and demodulation on the signals by the demodulator circuit; storing the converted and demodulated multi-channel signals in the DRAM; and reading the signals of at least one channel from the DRAM.

Abstract: The present invention discloses an interleaving memory read/write method, which comprises the steps of: providing a main memory storing readable data; and non-sequentially reading the data in the main memory by batches, wherein each batch of data includes at least two data. The data read from the main memory is stored in an auxiliary memory for further processing; the further processing does not occupy the operation time of the main memory.

Abstract: An ambient temperature control apparatus used for measuring ambient temperature. The apparatus has a bottom plate, a panel fitting apparatus, an external mask, and a temperature control device. The panel fitting apparatus is disposed on the bottom plate and is suitable for use to fix a liquid crystal panel. The external mask is detachably mounted on the bottom plate to form a cavity, in which the panel fitting apparatus and the liquid crystal panel are enclosed. The external mask includes at least a window allowing the photometer to measure the liquid crystal panel therefrom. The temperature control device mounted to the external mask is suitable to control the temperature variation of the cavity.

Abstract: An ambient temperature control apparatus used for measuring ambient temperature. The apparatus has a bottom plate, a panel fitting apparatus, an external mask, and a temperature control device. The panel fitting apparatus is disposed on the bottom plate and is suitable for use to fix a liquid crystal panel. The external mask is detachably mounted on the bottom plate to form a cavity, in which the panel fitting apparatus and the liquid crystal panel are enclosed. The external mask includes at least a window allowing the photometer to measure the liquid crystal panel therefrom. The temperature control device mounted to the external mask is suitable to control the temperature variation of the cavity.

Abstract: An ambient temperature control apparatus used for measuring ambient temperature. The apparatus has a bottom plate, a panel fitting apparatus, an external mask, and a temperature control device. The panel fitting apparatus is disposed on the bottom plate and is suitable for use to fix a liquid crystal panel. The external mask is detachably mounted on the bottom plate to form a cavity, in which the panel fitting apparatus and the liquid crystal panel are enclosed. The external mask includes at least a window allowing the photometer to measure the liquid crystal panel therefrom. The temperature control device mounted to the external mask is suitable to control the temperature variation of the cavity.