Abstract: A pixel driving circuit includes a driving control sub-circuit and a time control sub-circuit. The driving control sub-circuit includes a first driving sub-circuit. The first driving sub-circuit is configured to output a driving signal to drive an element to be driven to operate. The time control sub-circuit includes a second driving sub-circuit. The second driving sub-circuit is configured to output a third voltage signal to make the first driving sub-circuit stop outputting the driving signal, so as to control operating duration of the element to be driven.

Abstract: A pixel driving circuit includes a driving control sub-circuit and a driving duration control sub-circuit. The driving control sub-circuit includes a first driving sub-circuit connected to a first node. The driving control sub-circuit is configured to be connected to an element to be driven. The driving control sub-circuit is configured to output a driving signal to drive the element to be driven to operate. The driving duration control sub-circuit includes a second driving sub-circuit connected to a second node. The driving duration control sub-circuit is configured to write a first voltage signal into the second node, write a third voltage signal into the second node, and transmit a second voltage signal to the first node in response to a voltage variation at the second node to stop the first driving sub-circuit from outputting the driving signal, so as to control an operating duration of the element to be driven.

Abstract: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.

Abstract: The present application discloses pixel circuit including a current-control circuit coupled respectively to a first data-signal terminal, a first voltage terminal, a first scan-signal terminal, and a first output node. The current-control circuit is configured to output a driving current to the first output node based on a first data signal and a first voltage signal in response to a first scan signal. The pixel circuit further includes a timing-control circuit coupled respectively to a second data-signal terminal, a second scan-signal terminal, multiple modulation-signal terminals, the first output node, and a second output node. The timing-control circuit is configured to select one modulation signal based on a second data signal in response to a second scan signal and to output the driving current from the current-control circuit via the second output node to a light-emitting device based on the modulation signal.

Abstract: A pixel driving circuit includes a current controlling module, an outputting module and a time length controlling module including a comparator, a first energy storage element, an offset voltage writing sub-circuit, and first and second output sub-circuits. First terminal of first energy storage element is connected with first input terminal of comparator and second terminal with the first output sub-circuit. The second output sub-circuit is connected with second input terminal of comparator. The offset voltage writing sub-circuit writes an offset voltage of comparator to the first energy storage element. One of the first and second output sub-circuits outputs time signal and the other outputs reference voltage signal. The comparator outputs comparison signal according to the time signal and the reference voltage signal. The current controlling module outputs current signal.

Abstract: The present disclosure provides a display panel and a manufacturing method thereof, a display device. The display panel includes: a substrate; a plurality of driving electrodes and a micro light emitting diode located on a surface of the substrate, wherein respective electrodes of the micro light emitting diode are located at a side of the micro light emitting diode facing away from the substrate; and a plurality of driving wires respectively electrically coupling the respective electrodes of the micro light emitting diode to the plurality of driving electrodes.

Abstract: A display substrate includes a first substrate, a first sub-pixel layer and a second sub-pixel layer positioned on the first substrate; the first sub-pixel layer includes a plurality of first sub-pixels, the second sub-pixel layer includes a plurality of second sub-pixels, and a first orthographic projection of the first sub-pixel on the first substrate does not overlap with a second orthographic projection of the second sub-pixel on the first substrate. A display panel, a display device and a method for manufacturing the display substrate are also disclosed.

Abstract: A pixel circuit and a display device are provided. The pixel circuit includes: a data writing circuit, a storage capacitor circuit, a driving circuit, a light-emitting duration control circuit, and a light-emitting device, where the data writing circuit is configured to, in response to a gate driving signal, write a display data voltage on a display data line to a control end of the driving circuit; a first end of the storage capacitor circuit is electrically connected to a control end of the driving circuit; the light-emitting duration control circuit is configured to, in response to a duration data voltage provided by a duration data line, turn on or turn off an electrical connection between the second end of the driving circuit and the light-emitting device, to control a light-emitting duration of the light-emitting device.

Abstract: A display substrate includes: a plurality of sub-pixel regions at a first base substrate, each of the plurality of sub-pixel regions including a light-blocking region and aperture regions located at opposing sides of the light-blocking region; and a first transparent electrode and a second transparent electrode within each of the plurality of sub-pixel regions, configured to drive a liquid crystal layer; wherein the first transparent electrode includes a first electrode unit located inside the light-blocking region and including a plurality of first sub-electrodes, wherein each of the plurality of first sub-electrodes are separated from two adjacent first sub-electrodes by a separation distance; and wherein the separation distance between two adjacent first sub-electrodes nearest to a center line of the light-blocking region is smaller than the separation distance between two adjacent first sub-electrodes nearest to an edge of the light-blocking region.

Abstract: A display driving circuit includes N levels of display driving sub-circuits and N levels of switching sub-circuits. Each display driving sub-circuit is connected to a corresponding switching sub-circuit. An nth-level display driving sub-circuit includes an nth-level gate driving sub-circuit and an nth-level light-emitting control sub-circuit. An nth-level switching sub-circuit includes an nth-level gate driving switching sub-circuit and an nth-level light-emitting, control switching sub-circuit. The nth-level gate driving switching sub-circuit is configured to enable an nth-level gate driving signal output end to be electrically connected to a (2n?1)th gate line or a 2nth gate line.

Abstract: A pixel driving circuit includes a data writing sub-circuit, a driving sub-circuit, and a control sub-circuit. The data writing sub-circuit is configured to: in response to a first scanning signal and a third scanning signal, write a first data signal into the driving sub-circuit; and in response to a second scanning signal and the third scanning signal, write a second data signal into the driving sub-circuit. The control sub-circuit is configured to, in response to an enable signal, connect a driving transistor to a first power supply voltage signal terminal and an element to be driven. The driving sub-circuit is configured to: according to the first data signal and a first power supply voltage signal, output a driving signal; and according to the second data signal and the first power supply voltage signal, control an operating state of the element to be driven.

Abstract: A pixel circuit includes a current control circuit, a time control circuit, and a light-emitting component, which are electrically coupled to one another in series along a common passage path of a driving current. The current control circuit is configured to control an intensity of the driving current according to a display data signal received thereby. The time control circuit is configured to control a passage time of the driving current according to a time data signal and a switch control signal received thereby. The light-emitting component is configured to emit a light according to the intensity and the passage time of the driving current.

Abstract: The present disclosure provides a power source voltage application circuit, including a power source voltage output end, an energy storage sub-circuitry, a resetting sub-circuitry and an output control sub-circuitry. A first end of the energy storage sub-circuitry is connected to a first node, and a second end of the energy storage sub-circuitry is connected to a second node. The resetting sub-circuitry is connected to a resetting control end, a reference voltage input tend, the first node, the second node and an initial voltage input end respectively. The output control sub-circuitry is connected to an output control end, a first voltage input end, the first node, the second node and the power source voltage output end respectively.

Abstract: A pixel driving circuit includes a driving control sub-circuit and a driving duration control sub-circuit. The driving control sub-circuit includes a first driving sub-circuit connected to a first node. The driving control sub-circuit is configured to be connected to an element to be driven. The driving control sub-circuit is configured to output a driving signal to drive the element to be driven to operate. The driving duration control sub-circuit includes a second driving sub-circuit connected to a second node. The driving duration control sub-circuit is configured to write a first voltage signal into the second node, write a third voltage signal into the second node, and transmit a second voltage signal to the first node in response to a voltage variation at the second node to stop the first driving sub-circuit from outputting the driving signal, so as to control an operating duration of the element to be driven.

Abstract: An array substrate is provided. The array substrate includes a data line; a first voltage supply line; a second voltage supply line; and a pixel driving circuit. The pixel driving circuit includes one or more transistors in a first group and one or more transistors in a second group. A source electrode and a drain electrode of at least one transistor in the first group, the data line, the first voltage supply line, and the second voltage supply line are in a same layer. A source electrode and a drain electrode of at least one transistor in the second group are in a layer different from the first voltage supply line and the second voltage supply line.

Abstract: A pixel circuit and driving method are provided. The pixel circuit includes a light emitting device having a first terminal and a second terminal; a driving circuit, electrically connected to the first terminal of the light emitting device, for providing power to the light emitting device; a voltage comparator for generating a pulse width modulated signal having a duty cycle based on a data voltage and a reference voltage; an offset voltage detecting circuit, electrically connected to an output terminal of the voltage comparator, for detecting an input offset voltage of the voltage comparator; and a data voltage compensation circuit, electrically connected to the offset voltage detecting circuit, for compensating the data voltage according to the input offset voltage detected.

Abstract: A display backplane includes a base, a plurality of driving electrodes disposed above the base, and a connection structure disposed on at least one of the plurality of driving electrodes. An orthographic projection of the connection structure on the base is within an orthographic projection of a corresponding driving electrode on the base; and the connection structure includes at least one conductive portion disposed at a first included angle with the corresponding driving electrode.

Abstract: The present application discloses pixel circuit including a current-control circuit coupled respectively to a first data-signal terminal, a first voltage terminal, a first scan-signal terminal, and a first output node. The current-control circuit is configured to output a driving current to the first output node based on a first data signal and a first voltage signal in response to a first scan signal. The pixel circuit further includes a timing-control circuit coupled respectively to a second data-signal terminal, a second scan-signal terminal, multiple modulation-signal terminals, the first output node, and a second output node. The timing-control circuit is configured to select one modulation signal based on a second data signal in response to a second scan signal and to output the driving current from the current-control circuit via the second output node to a light-emitting device based on the modulation signal.

Abstract: A pixel structure and a method of driving the same, a display panel and a display device. The pixel structure includes: at least two pixel circuits and a conduction control circuit connected to the at least two pixel circuits. The conduction control circuit is configured to connect the at least two pixel circuits in parallel in response to a first control signal and to connect the at least two pixel circuits in series in response to a second control signal.

Abstract: An OLED touch display panel and a touch display device are disclosed. The OLED touch display panel includes a TFT back plate and a cathode layer disposed on the TFT back plate. The cathode layer includes a plurality of touch leads which are insulated from each other and a plurality of self-capacitance electrodes which are insulated from each other and arranged in a form of a matrix. The touch leads extend to a non-display region of the OLED touch display panel. Each one of the touch leads is connected with one of the self-capacitance electrodes, and resistance values of the touch leads connected with the self-capacitance electrodes of a same row are all consistent.