Abstract: The present disclosure provides a fuel cell performance optimization methodology combined with simulation method and experimental method, comprising: with the mutual coupling of simulation and experiment, a fuel cell simulation model is established, a bench test is performed, the model is calibrated, the operating conditions are refined and simulation and analysis are performed, and the optimal operating condition is obtained to perform the bench test, the optimal actual output voltage of the fuel cell is obtained, and the output voltage optimization result of the fuel cell are verified. The present disclosure not only reduces the number of experiments and experiment cycles in the process of fuel cell operation condition optimization, but also improves the reliability and accuracy of simulation results, and better plays the role of simulation in optimization.

Abstract: The present disclosure provides a flow path selection valve, a fluidic system, and a method for controlling fluid flow. The flow path selection valve is configured to switch between a first valve position and a second valve position, and the flow path selection valve is provided with a common port, a plurality of first ports, a plurality of second ports, a first communication groove, and second communication grooves. In a case that the flow path selection valve is in the first valve position, the plurality of first ports are in communication with the common port through the first communication groove; in a case that the flow path selection valve is in the second valve position, the first ports are in communication with the second ports through the second communication grooves in a one-to-one correspondence.

Abstract: A temperature control system for fuel cell includes a fuel cell under test, having two end plates, and the end plates having an area. At least two temperature regulating modules, respectively on a surface of one side of the two end plates facing outside of the fuel cell under test, and an area of a heat radiation surface of the temperature regulating module opposite the end plates is greater than or equal to a first preset proportion of the first preset value. At least two temperature detection modules, mounted to the cathode and anode of the fuel cell under test, for obtaining a measured temperature. A control module, connected to the temperature detection module and connected to the temperature regulating module, for controlling of the two temperature regulating modules to regulate the measured temperature of the cathode and anode to tend to a target temperature.

Abstract: Disclosed is an apparatus for testing the thermal-state conduction performance of an electrical penetration piece of a high-temperature gas-cooled reactor. The apparatus includes a testing mechanism. The testing mechanism includes a base, a test portion arranged on the base. According to the apparatus for testing the thermal-state conduction performance of the electrical penetration piece of the high-temperature gas-cooled reactor, a threaded rod is rotated to drive a winding column to rotate to tension an insulating rope, and the insulating rope is tensioned to drive a copper pipe to be contracted to be in close contact with pins, so that the connection of the pins of the electrical penetration piece is completed. Through the testing portion, the conduction performance of the electrical penetration piece of a primary circuit of an absorption ball system can be tested in the helium atmosphere at 160° C.

Abstract: The present application discloses a method for controlling the liquid inflow of a liquid path system, a liquid path system, a sequencing apparatus, a computer device, and a computer storage medium. The method includes: using a pump valve assembly to aspirate a plurality of samples under test from a sample cartridge and pump each sample under test from an outlet of one corresponding fluid channel into the fluid channel; or using the pump valve assembly to aspirate a single sample under test from the sample cartridge and pump the single sample under test from an inlet of each fluid channel into the fluid channel. In this way, different sample loading modes can be selected according to the number of the samples under test, improving the loading flexibility of the samples under test.

Abstract: The embodiments of the present application disclose a method and apparatus for processing information, a device, a medium, and a controller cluster, which relate to the technical field of communications, and may reduce communication states that need to be maintained by a node. The method includes: performing any of followings when there is no node event: receiving a target request, and converting a local node state of a node into a first state, the target request being used for initiating a target information synchronization task, and the first state being used for characterizing that the node is executing the target information synchronization task as a remote node; and transmitting the target request, and converting the local node state of the node into a second state, the second state being used for characterizing that the node is executing the target information synchronization task as a primary writing node.

Abstract: A method for processing information includes: performing any of followings when there is no node event: receiving a target request, and converting a local node state of a node into a first state, the target request being used for initiating a target information synchronization task, and the first state being used for characterizing that the node is executing the target information synchronization task as a remote node; and transmitting the target request, and converting the local node state of the node into a second state, the second state being used for characterizing that the node is executing the target information synchronization task as a primary writing node. The controller cluster is configured to unidirectionally transmit the target request between the primary writing node and the remote node in a same domain according to a set communication direction.

Abstract: A method for processing a log request includes: obtaining, for a write request for log information of each service, a service identifier of the service and a traffic type of the service, where the traffic type is used to indicate a write traffic range of the log information of the service within a preset duration; determining, based on the service identifier and the traffic type of the service, at least one target log server that processes the write request, and determining, based on the service identifier and the traffic type of the service, storage path information of the log information of the service on a log storage unit; and writing, through the at least one target log server, the log information of the service into the log storage unit based on the storage path information.

Abstract: The present disclosure relates to a device and a method for valuating a heat dissipation capability of a test platform of hydrogen fuel cell system. A plurality of PTC heaters are connected in series or in parallel in a primary or secondary dispersion water loop to simulate the fuel cell system with different heating powers. A rotation speed of water pump and whether a PTC is operated are controlled, thereby implementing steady and dynamic tests, and a test for integrative operating condition, thereby avoiding a real machine test from controlling a plurality of parameters. Compared with the real machine of a fuel cell, it can better test the heat dissipation capability of the fuel cell system. During the operation, the device does not need to be supplied reaction gases to ensure the safety of the test. The primary and secondary dispersion tests can be performed separately or in parallel.

Abstract: The present disclosure relates to the technical field of biomolecule detection systems and to a carrier apparatus and a biomolecule detection system. The carrier apparatus includes: a carrier structure that includes a carrier stage provided with a carrier surface configured to carry a chip, the carrier stage including a space to be vacuumized therein; and a vacuum system that communicates with the space to be vacuumized and causes a negative pressure of greater than or equal to ?60 kPa to be generated in the space to be vacuumized, thereby causing the chip to be adsorbed and fixed to the carrier surface. In the carrier apparatus of the embodiments, arranging the carrier structure provided with the carrier stage including the space to be vacuumized therein in fit with the vacuum system enables the negative pressure to be generated in the space to be vacuumized to adsorption-fix the chip.

Abstract: A low inductance capacitor with annular distributed cores is provided, which relates to the technical field of capacitors, and includes a lower bus bar, capacitor cores and an upper bus bar. Currents accessed from lower connection terminals flow to a closed end of the lower bus bar along copper bar connecting plates, and flow to the upper bus bar through the capacitor cores, and then flow out from upper connection terminals to form a loop. And positions of the copper bar connecting plates are in one-to-one correspondence with positions of the capacitor cores, and flow directions of the currents are opposite.

Abstract: The present disclosure provides a fuel cell performance optimization methodology combined with simulation method and experimental method, comprising: with the mutual coupling of simulation and experiment, a fuel cell simulation model is established, a bench test is performed, the model is calibrated, the operating conditions are refined and simulation and analysis are performed, and the optimal operating condition is obtained to perform the bench test, the optimal actual output voltage of the fuel cell is obtained, and the output voltage optimization result of the fuel cell are verified. The present disclosure not only reduces the number of experiments and experiment cycles in the process of fuel cell operation condition optimization, but also improves the reliability and accuracy of simulation results, and better plays the role of simulation in optimization.

Abstract: A device for detection of a display panel is provided in the embodiments of the disclosure, which is configured to detect signal lines on the display panel. The signal lines at least comprises a plurality of data lines which are divided into N groups; the device comprises: N shorting bars provided within an electrode lead region of the display panel to intersect the plurality of data lines, a plurality of welding pads provided on both sides of the electrode lead region, each of which shorting bars short-circuits one of the N groups of data lines together and connects with two welding pad at both ends thereof respectively, and a switch which is provided between each of the shorting bars and each of the corresponding welding pads connecting with the former on one and the same side of all the shorting bars; and N is a positive integer not less than.

Abstract: An array substrate motherboard includes a substrate including a plurality of gate lines, a plurality of gate line driving leads, a plurality of data lines, and a plurality of data line driving leads; a plurality of gate line testing leads; a plurality of data line testing leads and a plurality of data line driving leads; a plurality of gate line testing pads; a plurality of data line testing pads; and an insulating layer arranged between the data line testing leads and the data line driving leads in the trimming region. A respective one of the plurality of data line testing pads is connected with a respective one of the plurality of data line testing leads. A respective one of the plurality of data line driving leads is connected with one of the plurality of data line testing leads that penetrate through the insulating layer.

Abstract: An array substrate motherboard includes a substrate including a plurality of gate lines, a plurality of gate line driving leads, a plurality of data lines, and a plurality of data line driving leads; a plurality of gate line testing leads; a plurality of data line testing leads and a plurality of data line driving leads; a plurality of gate line testing pads; a plurality of data line testing pads; and an insulating layer arranged between the data line testing leads and the data line driving leads in the trimming region. A respective one of the plurality of data line testing pads is connected with a respective one of the plurality of data line testing leads. A respective one of the plurality of data line driving leads is connected with one of the plurality of data line testing leads that penetrate through the insulating layer.

Abstract: A light-on module testing device, a method for testing a light-on module and a method for testing a display panel are disclosed. The light-on module testing device includes a base, a support element disposed on the base, and a test platform disposed on the base, wherein an arm is disposed on the support element, and the arm is configured to fix a light-on module to be tested, and a tester is disposed on the test platform and the tester has a signal output end.

Abstract: In some embodiments, an array substrate motherboard and a fabricating method thereof are provided. The method includes: providing a substrate including multiple gate lines, gate driving leads, data lines, and data driving leads, each gate line corresponds to one gate driving lead, each data line corresponds to one data driving lead; forming multiple gate line testing leads, each gate line testing lead is connected with a gate driving lead; forming multiple data line testing leads, each data line testing lead is connected with a subset of the multiple data driving leads; forming multiple gate line testing pads, each gate line testing pad is connected with a gate line testing lead; forming multiple data line testing pads, each data line testing pad is connected with two data line testing leads; and using the gate line testing pads and gate line testing pads to test the gate lines and data lines.

Abstract: A device for detection of a display panel is provided in the embodiments of the disclosure, which is configured to detect signal lines on the display panel. The signal lines at least comprises a plurality of data lines which are divided into N groups; the device comprises: N shorting bars provided within an electrode lead region of the display panel to intersect the plurality of data lines, a plurality of welding pads provided on both sides of the electrode lead region, each of which shorting bars short-circuits one of the N groups of data lines together and connects with two welding pad at both ends thereof respectively, and a switch which is provided between each of the shorting bars and each of the corresponding welding pads connecting with the former on one and the same side of all the shorting bars; and N is a positive integer not less than.

Abstract: In some embodiments, an array substrate motherboard and a fabricating method thereof are provided. The method includes: providing a substrate including multiple gate lines, gate driving leads, data lines, and data driving leads, each gate line corresponds to one gate driving lead, each data line corresponds to one data driving lead; forming multiple gate line testing leads, each gate line testing lead is connected with a gate driving lead; forming multiple data line testing leads, each data line testing lead is connected with a subset of the multiple data driving leads; forming multiple gate line testing pads, each gate line testing pad is connected with a gate line testing lead; forming multiple data line testing pads, each data line testing pad is connected with two data line testing leads; and using the gate line testing pads and gate line testing pads to test the gate lines and data lines.

Abstract: The present application discloses a display panel test structure for testing whether signal lines of a display panel are defective, the signal lines at least comprising a plurality of data lines which are divided into N groups, the display panel test structure comprising N first shorting bars arranged in a test area of the display panel, each of which being configured to short-circuit a group of data lines, wherein the display panel test structure further comprises a plurality of first test pads arranged in the test area, each of which connects with one shorting bar corresponding thereto, and each of the first test pads is configured to load a signal to a group of data lines corresponding thereto during a test.