Patents by Inventor Ming-Kun Chen

Ming-Kun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9274167
    Abstract: A chip-to-chip signal transmission system is provided, which includes a first chip, a second chip, and a dielectric layer. A signal transmission is performed between a transmitter of the first chip and a receiver of the second chip through a transmission-metal-pad unit and a receiving-metal-pad unit. The transmitter transmits a transmission-testing-coupling signal through the transmission-metal-pad unit according to a driving-testing signal when the transmitter receives the driving-testing signal. A first testing unit receives the transmission-testing-coupling signal and outputs a transmission-testing signal according to the transmission-testing-coupling signal. A second testing unit transmits a receiving-testing-coupling signal through the receiving-metal-pad unit according to the driving-testing signal when the second testing unit receives the driving-testing signal.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 1, 2016
    Assignee: I-SHOU UNIVERSITY
    Inventors: Yu-Jung Huang, Ming-Kun Chen, Kai-Jen Liu
  • Publication number: 20150010092
    Abstract: A signal transmission system and a signal transmission circuit are provided. The system includes a first chip and a second chip. A rising pulse signal (RPS) and a falling pulse signal (FPS) are generated by a transmission module on the first chip in response to a waveform of an input signal.
    Type: Application
    Filed: October 15, 2013
    Publication date: January 8, 2015
    Applicant: I-SHOU UNIVERSITY
    Inventors: Chun-Wei Huang, Yu-Jung Huang, Ming-Kun Chen
  • Patent number: 8913687
    Abstract: A signal transmission system and a signal transmission circuit are provided. The system includes a first chip and a second chip. A rising pulse signal (RPS) and a falling pulse signal (FPS) are generated by a transmission module on the first chip in response to a waveform of an input signal. The RPS corresponds to rising edges of the input signal, the FPS corresponds to falling edges of the input signal, and the RPS and the FPS are transmitted by a first transmission unit and a second transmission unit both located on a surface of the first chip.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: December 16, 2014
    Assignee: I-Shou University
    Inventors: Chun-Wei Huang, Yu-Jung Huang, Ming-Kun Chen
  • Publication number: 20140210496
    Abstract: A chip-to-chip signal transmission system is provided, which includes a first chip, a second chip, and a dielectric layer. A signal transmission is performed between a transmitter of the first chip and a receiver of the second chip through a transmission-metal-pad unit and a receiving-metal-pad unit. The transmitter transmits a transmission-testing-coupling signal through the transmission-metal-pad unit according to a driving-testing signal when the transmitter receives the driving-testing signal. A first testing unit receives the transmission-testing-coupling signal and outputs a transmission-testing signal according to the transmission-testing-coupling signal. A second testing unit transmits a receiving-testing-coupling signal through the receiving-metal-pad unit according to the driving-testing signal when the second testing unit receives the driving-testing signal.
    Type: Application
    Filed: May 29, 2013
    Publication date: July 31, 2014
    Applicant: I-SHOU UNIVERSITY
    Inventors: Yu-Jung Huang, Ming-Kun Chen, Kai-Jen Liu
  • Patent number: 8592982
    Abstract: A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: November 26, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Tai-Ping Wang, Ming-Hsiang Cheng
  • Patent number: 8421491
    Abstract: Provided is an active non-contact probe card including a carrier, a support base, a piezoelectric material layer, an active sensor array chip and a control circuit. The support base is disposed on the carrier. The piezoelectric material layer is connected with the support base. The position of the active sensor array chip with respect to the carrier is determined according to the thicknesses of the support base and the thicknesses of the piezoelectric material layer. A control circuit provides a control voltage to the piezoelectric material layer to control the thickness of the piezoelectric material layer, so as to adjust the position of the active sensor array chip with respect to the carrier.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 16, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Kun Chen, Yi-Lung Lin
  • Patent number: 8368216
    Abstract: The present invention relates to a semiconductor package having at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface upon which the first metal bumps are disposed and a plurality of first signal coupling pads disposed adjacent to the first active surface. The second layer chip is electrically connected to the first layer chip, and includes a second active surface that faces the first active surface and a plurality of second signal coupling pads. The second signal coupling pads are capacitively coupled to the first signal coupling pads so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps, and the second layer chip, and the first metal bumps are partially exposed.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 5, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Patent number: 8253431
    Abstract: The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: August 28, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, I. L. Lin, Ken Juang, Ming-Hsiang Cheng
  • Publication number: 20120153489
    Abstract: A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.
    Type: Application
    Filed: October 4, 2011
    Publication date: June 21, 2012
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: YI-SHAO LAI, TSUNG-YUEH TSAI, MING-KUN CHEN, TAI-PING WANG, MING-HSIANG CHENG
  • Publication number: 20120091575
    Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a substrate, at least one first chip, a dielectric layer and at least one second chip. The first chip is attached and electrically connected to the substrate. The first chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The dielectric layer is disposed on the first active surface. The second chip is attached and electrically connected to the substrate by metal bumps. The second chip includes a second active surface and a plurality of second signal coupling pads. The second active surface contacts the dielectric layer. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip.
    Type: Application
    Filed: October 15, 2010
    Publication date: April 19, 2012
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Publication number: 20120049360
    Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The first metal bumps are disposed on the first active surface of the first layer chip. The second layer chip is electrically connected to the first layer chip, and includes a second active surface and a plurality of second signal coupling pads. The second active surface faces the first active surface of the first layer chip. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first layer chip, so as to provide proximity communication between the first layer chip and the second layer chip.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Publication number: 20110309516
    Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of first signal coupling pads. The first non-top metal layer is disposed adjacent to and spaced apart from the first active surface by a second distance. The first signal coupling pads are disposed on the first non-top metal layer. The second chip is electrically connected to the first chip. The second chip comprises a second active surface, at least one second non-top metal layer and a plurality of third signal coupling pads. The second active surface faces the first active surface of the first chip. The second non-top metal layer is disposed adjacent to and spaced apart from the second active surface by a fourth distance.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 22, 2011
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Publication number: 20110298139
    Abstract: The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and a second chip. The substrate has a first surface, a second surface and at least one through hole. The first chip is disposed adjacent to the first surface of the substrate. The first chip includes a first active surface and a plurality of first signal pads. Part of the first active surface is exposed to the through hole. The position of the first signal pads corresponds to the through hole. The second chip is disposed adjacent to the second surface. The second chip includes a second active surface and a plurality of second signal pads. Part of the second active surface is exposed to the through hole. The position of the second signal pads corresponds to the through hole, and the second signal pads are capacitively coupled to the first signal pads of the first chip, so as to provide proximity communication between the first chip and the second chip.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 8, 2011
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Patent number: 8072064
    Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of first signal coupling pads. The first non-top metal layer is disposed adjacent to and spaced apart from the first active surface by a second distance. The first signal coupling pads are disposed on the first non-top metal layer. The second chip is electrically connected to the first chip. The second chip comprises a second active surface, at least one second non-top metal layer and a plurality of third signal coupling pads. The second active surface faces the first active surface of the first chip. The second non-top metal layer is disposed adjacent to and spaced apart from the second active surface by a fourth distance.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: December 6, 2011
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Publication number: 20110291690
    Abstract: The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on to and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening.
    Type: Application
    Filed: May 20, 2010
    Publication date: December 1, 2011
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, I.L. Lin, Ken Juang, Ming-Hsiang Cheng
  • Publication number: 20110278739
    Abstract: The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and an interposer. The first chip is mechanically and electrically connected to the substrate. Some signal pads of the interposer are capacitively coupled to some signal pads of the first chip, so as to provide proximity communication between the first chip and the interposer. Whereby, the capacitively coupled signal pads can be made in fine pitch, and therefore the size of the semiconductor package is reduced and the density of the signal pads is increased.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, Hsiao-Chuan Chang, Ming-Hsiang Cheng
  • Publication number: 20110156739
    Abstract: A test kit for testing a chip subassembly and a testing method by using the same is provided. The chip subassembly includes at least two stacked chips each having a number of electric contacts is provided. The test kit includes a test socket and a test plate. The test socket is configured to electrically engage the electric contacts on a first side of the chip subassembly. The test plate has at least a number of first probes configured for electrically engaging the electric contacts on a second side of the chip subassembly. At least one of the test socket and the test plate has a number of second probes for electrically connecting the test socket and the test plate.
    Type: Application
    Filed: December 31, 2009
    Publication date: June 30, 2011
    Inventors: Hsiao-Chuan CHANG, Ming-Hsiang CHENG, Tsung-Yueh TSAI, Yi-Shao LAI, Ming-Kun CHEN
  • Patent number: 7929856
    Abstract: An exemplary method for capturing a still image includes: measuring a theoretic exposure time that is suitable for current ambient light conditions; controlling a charge coupled device image sensor to expose itself for a real exposure time according to the determined theoretic exposure time to capture an image signal; and adjusting the captured image signal according to a ratio of the theoretic exposure time to the real exposure time.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: April 19, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Ming-Kun Chen
  • Patent number: D1017882
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: March 12, 2024
    Assignee: JIAXING SUPER LIGHTING ELECTRIC APPLIANCE CO., LTD
    Inventors: Tao Jiang, Ming-Bin Wang, Chen-Kun Chen, Dong-Mei Zhang
  • Patent number: D1018774
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: March 19, 2024
    Assignee: HOMEWAY TECHNOLOGY CO., LTD.
    Inventors: Ming-Kun Chen, Chin-Hsing Hsieh, Tsung-Hsien Hsieh