Abstract: This application discloses a ranging method and device, a storage medium, and a LiDAR. The method includes: determining an edge field of view and a central field of view; acquiring a light emission power for the edge field of view and a light emission power for the central field of view; compensating the light emission power for the edge field of view based on a difference between the light emission power for the edge field of view and the light emission power for the central field of view, and detecting a target object based on the light emission power for the central field of view and the compensated light emission power for the edge field of view.

Abstract: Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a passgate, a passgate inverter, a leakage compensation unit, and an inverter. The passgate may be coupled between a flip-flop data input terminal and a first node. The passgate inverter and the inverter may be sequentially connected between the first node and a flip-flop data output terminal. The leakage compensation unit may be connected between the first node and the flip-flop data output terminal parallel to the passgate inverter and the inverter.

Abstract: Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a first passgate, a first latch, a second passgate, and a second latch. The first latch may include a first inverter and a first logic gate. The first logic gate may further include a second inverter and at least one voltage reducing component. The voltage reducing component may be an N-channel transistor or a P-channel transistor. Similarly, the second latch may include a third inverter and a second logic gate. The second logic gate may further include a fourth inverter and at least one voltage reducing component.

Abstract: Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a passgate, a passgate inverter, a leakage compensation unit, and an inverter. The passgate may be coupled between a flip-flop data input terminal and a first node. The passgate inverter and the inverter may be sequentially connected between the first node and a flip-flop data output terminal. The leakage compensation unit may be connected between the first node and the flip-flop data output terminal parallel to the passgate inverter and the inverter.

Abstract: Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a first passgate, a first latch, a second passgate, and a second latch. The first latch may include a first inverter and a first logic gate. The first logic gate may further include a second inverter and at least one voltage reducing component. The voltage reducing component may be an N-channel transistor or a P-channel transistor. Similarly, the second latch may include a third inverter and a second logic gate. The second logic gate may further include a fourth inverter and at least one voltage reducing component.

Abstract: Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.

Abstract: Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.

Abstract: A controller for use in a power converter includes a first edge detection circuit that receives a first input sense signal representative of an input of the power converter coupled to a dimmer circuit, and generates a first edge detection signal in response to the first input sense signal. A shaping circuit receives the first edge detection signal from the first edge detection circuit. The shaping circuit generates a first shape signal in response to the first edge detection signal. A drive circuit receives the first shape signal and a feedback signal representative of an output of the power converter. The drive circuit generates the drive signal in response to the feedback signal to control switching of a power switch of the power converter. The drive circuit switches the power switch in a first higher current mode for a first duration in response to the first shape signal.

Abstract: A transient event detector includes a first reference generator, an adjustable low-pass filter, and a comparator. The first reference generator coupled to scale the input current signal to generate a first reference current signal that tracks the input current signal. The adjustable low-pass filter circuit is coupled to receive the input current signal and to generate a filtered input current signal such that a magnitude of a slope of the filtered input current signal is less than the magnitude of the slope of the input current signal during a transient event. The first comparator is coupled to generate an event detection signal that indicates the presence of the transient event in response to a value of the filtered input current signal reaching a value of the first reference current signal. The adjustable low-pass filter circuit is configured to increase the cutoff frequency in response to the event detection signal.

Abstract: A controller for use in a power converter includes a state selection circuit coupled to receive an input voltage sense signal representative of an input voltage, a switch current sense signal representative of a switch current of a power switch, and a feedback signal representative of an output quantity of the power converter. The state selection circuit is coupled to generate an input voltage signal in response to the input voltage sense signal, an input current signal in response to the switch current sense signal, and an input threshold signal in response to the feedback signal. A state machine circuit is coupled to the state selection circuit to generate a drive signal in response to the input voltage signal, the input current signal, and the input threshold signal to switch the power switch to control a transfer of energy from an input to an output of the power converter.

Abstract: A controller includes a multiplier block that is coupled to receive an input voltage signal, an input current signal, and an output voltage signal that are representative of a power conversion system. The multiplier block outputs a multiplier block output signal responsive to a product of the input voltage signal and the input current signal divided by the output voltage signal. A signal discriminator outputs a error signal responsive to the multiplier block output signal. The error signal is representative of a difference between a portion of the multiplier block output signal that is greater than a reference signal and a portion of the multiplier block output signal that is less than or equal to the reference signal. A switch controller generates a drive signal responsive to the error signal to control switching of a power switch to regulate an average output current of the power conversion system.

Abstract: A controller for controlling a power supply includes a feedback signal generator to generate a feedback signal representative of an output current in response to an output sense signal. A state selector circuit receives the feedback signal and outputs a digital state signal to set an operational state of a switch of the power supply. The state selector circuit adjusts the digital state signal in response to feedback information at an end of a feedback period. A driver circuit receives the digital state signal and generates a drive signal in response to the digital state signal. The drive signal drives switching of the switch in accordance with the operational state of the switch.

Abstract: Thermally protected bleeder circuits for maintaining an input current of a power converter above a dimmer circuit holding current are disclosed. In one example, a bleeder control circuit may generate a bleeder control signal to control a bleeder current of the bleeder circuit based on an input current signal and a temperature signal. The bleeder control circuit may cause the bleeder current to be substantially equal to zero in response to the input current signal being greater than or equal to a reference signal, and may cause the bleeder current to be proportional to a difference between the input current signal and the reference signal in response to the input current signal being less than the reference signal. The reference signal may be constant for temperatures less than a threshold temperature, but may decrease with respect to increases in temperature for temperatures greater than the threshold temperature.

Abstract: An example power supply controller includes a signal separator circuit that generates a feedback signal. An error signal generator generates an error signal in response to the feedback signal. A control circuit generates a drive signal in response to the error signal. The drive signal controls switching of a switch. A multi-cycle modulation circuit is included in the control circuit and generates a skip signal in response to a start skip signal, a stop skip signal and a skip mask signal. The skip mask signal is generated in response to the skip signal. The start skip and stop skip signals cause the drive signal to start skipping or stop skipping, respectively, on-time intervals of cycles. The skip mask signal disables the start skip signal from causing the drive signal to start skipping the on-time intervals of cycles.

Abstract: A bleeder controller for controlling a magnitude of a variable current conducted by bleeder circuitry between input terminals of a device is disclosed. The magnitude of the variable current is controllable in response to a control signal. The bleeder controller includes a dimming detector to classify a half line cycle as leading-edge-dimmed or a trailing-edge-dimmed in response to at least one of an input current sense signal and an input voltage sense signal.

Abstract: A power conversion device includes a power switch a first main terminal coupled to a higher potential portion, a second main terminal coupled to a lower potential portion, and a tap coupled to the first main terminal to provide a current for charging a supply terminal capacitor. A controller is coupled to a control terminal of the power switch to control switching of the power switch to produce a regulated output. A supply terminal is to be coupled to a supply terminal capacitor to store a charge for supplying power to at least some of the components of the controller. A voltage regulator is coupled to regulate the charge stored and a potential on the supply terminal capacitor. The current for charging the supply terminal capacitor is selectively drawn from the tap of the power switch in response to the supply terminal capacitor being below a threshold.

Abstract: A controller for a power converter includes conduction detection circuitry and a variable reference generator. The conduction detection circuitry is coupled to generate a conduction signal representative of conduction times that an input signal is above a threshold value. The variable reference generator is coupled to receive the conduction signal and configured to generate a count value in response to a first conduction time of the conduction signal. The variable reference generator is coupled to output a reference signal in response to the count value and in response to prior count values stored in the variable reference generator.

Abstract: A power converter controller asserts a leading edge signal when a leading edge of a voltage signal is detected. The voltage sense signal is representative of an input voltage of the power converter. A trailing edge signal is asserted when a trailing edge of the voltage signal is detected. A first state of a threshold signal is generated when the voltage sense signal is at or above an upper threshold and generating a second state of the threshold signal when the voltage sense signal is at or below a lower threshold. A conduction signal is updated in response to the leading edge signal, the trailing edge signal, and the threshold signal. The conduction signal is for controlling a switch coupled to regulate an output of the power converter.

Abstract: A controller for a power converter includes an edge detection circuit including a first circuit coupled to coupled to compare a voltage sense signal representative of an input voltage to a first reference, and a second circuit coupled to compare a current sense signal representative of an input current to a second reference. A slope sense circuit is coupled to measure a slope of the voltage sense signal over time. An edge driver circuit is coupled to generate an edge signal that indicates that an edge has been determined when the voltage sense signal is greater than the first reference, the current sense signal is lower than the second reference, and the slope is negative. A drive circuit is coupled to output a drive signal in response to the edge signal. The drive signal is for controlling a switch coupled to regulate an output of the power converter.

Abstract: A controller for use in a power converter includes logic circuits to turn on and off a switch to regulate an output quantity. A first integrating capacitor is charged with a combination of a first current and a second current while the switch is turned on. The first current is proportional to a reset voltage and the second current is proportional to an input voltage. A reference generation circuit including a second integrating capacitor is charged with the first current during a previous switching cycle of the switch. The reference generation circuit generates a reference voltage in response to the second integrating capacitor. A comparator provides a stop signal to the logic circuits to turn off the switch in response to a comparison of a voltage across the first integrating capacitor with the reference voltage.