Patents by Inventor Mingqin Xie

Mingqin Xie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10574218
    Abstract: A digital glitch filter for filtering glitches in an input signal includes a first flip-flop for generating a filtered output signal, and a self-oscillating circuit for generating a self-oscillating clock signal. A first logic gate enables the self-oscillating circuit when the filtered output signal is not equal to the input signal. A ripple counter generates a divided clock signal by dividing the self-oscillating clock signal. A counter and comparator counts the divided clock signal to obtain a count number and compares the count number with a predetermined count target. A second flip-flop, which is connected to the counter and comparator, generates a valid signal, which is activate when the count number reaches the count target. The valid signal is input to the first flip-flop such that the filtered output signal toggles when the valid signal is active.
    Type: Grant
    Filed: January 1, 2019
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Zhixiong Lin, Mingqin Xie, Yong Zhu
  • Publication number: 20190379368
    Abstract: A digital glitch filter for filtering glitches in an input signal includes a first flip-flop for generating a filtered output signal, and a self-oscillating circuit for generating a self-oscillating clock signal. A first logic gate enables the self-oscillating circuit when the filtered output signal is not equal to the input signal. A ripple counter generates a divided clock signal by dividing the self-oscillating clock signal. A counter and comparator counts the divided clock signal to obtain a count number and compares the count number with a predetermined count target. A second flip-flop, which is connected to the counter and comparator, generates a valid signal, which is activate when the count number reaches the count target. The valid signal is input to the first flip-flop such that the filtered output signal toggles when the valid signal is active.
    Type: Application
    Filed: January 1, 2019
    Publication date: December 12, 2019
    Inventors: ZHIXIONG LIN, MINGQIN XIE, YONG ZHU
  • Patent number: 8736301
    Abstract: A System on a Chip (SoC) has a first set of switches, each having first terminals for routing SoC signals and a second terminal, and a second set of switches. Each switch of the second set of switches has third terminals for routing signals with the first set of switches, and a fourth terminal. A SoC control module defines a switching configuration, and includes a first memory portion for storing a first switching protocol for the first set of switches. This defines, for a switch of the first set of switches, an electrical path between one of the first terminals and the second terminal. A second memory portion stores a second switching protocol for the second set of switches, and defines, for a switch of the second set of switches, an electrical path between one of the third terminals and the fourth terminal.
    Type: Grant
    Filed: September 9, 2012
    Date of Patent: May 27, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mingqin Xie, Shayan Zhang
  • Publication number: 20130293261
    Abstract: A System on a Chip (SoC) has a first set of switches, each having first terminals for routing SoC signals and a second terminal, and a second set of switches. Each switch of the second set of switches has third terminals for routing signals with the first set of switches, and a fourth terminal. A SoC control module defines a switching configuration, and includes a first memory portion for storing a first switching protocol for the first set of switches. This defines, for a switch of the first set of switches, an electrical path between one of the first terminals and the second terminal. A second memory portion stores a second switching protocol for the second set of switches, and defines, for a switch of the second set of switches, an electrical path between one of the third terminals and the fourth terminal.
    Type: Application
    Filed: September 9, 2012
    Publication date: November 7, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Mingqin Xie, Shayan Zhang