Abstract: A semiconductor structure a method of fabricating thereof including a substrate having a device region and a dummy region. A first active region is disposed over the substrate in the device region and a second active region is over the substrate in the dummy region. A first operational gate structure over the first active region and a first non-operational gate structure over the second active region. A first epitaxial region of an n-type dopant is adjacent the first operation gate structure; and a second epitaxial region of an n-type dopant is adjacent the first non-operational gate structure.

Abstract: An interconnect structure includes a conductive feature embedded in a dielectric feature. The conductive feature has a first horizontal portion and a first vertical portion. The first horizontal portion extends in a horizontal direction to terminate at two edge surfaces. The first horizontal portion includes graphene layers stacked on each other, and an intercalation material interposed among the graphene layers. The intercalation material includes a first atom dopant including one of a group 1 metal, a group 2 metal, a group 3 metal, a lanthanide series metal, an actinide series metal, and combinations thereof. The first vertical portion extends in a vertical direction and is in contact with one of the two edge surfaces of the first horizontal portion. The first vertical portion is made of a first electrically conductive metal material.

Abstract: Embodiments of the present disclosure provide a furnace for semiconductor processing that includes an inner tube defining a reaction chamber and including a sidewall defined along a longitudinal axis of the inner tube and including one or more slits defined through the sidewall in a radial direction with respect to the longitudinal axis. The one or more slits include at least one of a first slit with a width in a range between 10 mm and 100 mm, or a plurality of separate slits with a total number in a range between 2 and 15. The inner tube includes a closed end substantially enclosing the reaction chamber and an open end opposite the closed end with respect to the longitudinal axis. The reaction chamber is configured to be loaded with one or more semiconductor wafers via the open end.

Abstract: A semiconductor structure includes a semiconductor substrate, an interconnect structure disposed on the semiconductor substrate and including a conductive interconnect; and a cap layer disposed on the interconnect structure. The cap layer includes a cap portion disposed on the conductive interconnect. The cap portion includes a plurality of two-dimensional material sheets stacked on each other and has a lower surface proximate to the conductive interconnect. The lower surface of the cap portion is formed with a plurality of dangling bonds such that the cap portion is adhered to the conductive interconnect through the dangling bonds.

Abstract: A heating device includes a resonant circuit, a detection unit and a control unit. The resonant circuit includes an inverter circuit and a resonant tank. The inverter circuit provides a resonant tank current and a resonant tank voltage. The resonant tank includes a heating coil, a resonant tank capacitor, a resonant tank equivalent inductor and a resonant tank equivalent resistor. The detection unit calculates an inductance of the resonant tank equivalent inductor according to a capacitance of the resonant tank capacitor, a resonant period and a first expression. The detection unit calculates a resistance of the resonant tank equivalent resistor according to the inductance of the resonant tank equivalent inductor, a time change value, a reference voltage value, a negative peak voltage value and a second expression.

Abstract: An interconnect structure and methods of forming the same are described. In some embodiments, the structure includes a first dielectric layer and one or more first conductive features disposed in the first dielectric layer. The one or more first conductive features includes a first metal. The structure further includes a plurality of graphene layers disposed on each of the one or more first conductive features, the plurality of graphene layers include a second metal intercalated therebetween, and the second metal is different from the first metal.

Abstract: Methods, systems, and apparatuses are provided for sidelink transmission with beamforming in a wireless communication system, with a method of a first User Equipment (UE) comprising performing one or more unicast sidelink transmissions with one or more destinations comprising a second destination associated with a second UE, and transmitting information indicating a set of Transmission Time Intervals (TTIs) to a network node, wherein the set of TTIs corresponds to the second UE monitoring or receiving Sidelink Control Information (SCI) in the sidelink resource pool via a second beam associated with the first UE.

Abstract: Methods, systems, and apparatuses are provided for handling sidelink reference signals for beam management in a wireless communication system, with a method of a first device comprising being scheduled or requested to perform one or more standalone Sidelink (SL) Channel State Information Reference Signal (CSI-RS) transmissions, receptions, or measurements in a first sidelink Transmission Time Interval (TTI) in a first sidelink resource pool in a sidelink carrier or cell, being scheduled or requested to perform a first sidelink data and/or feedback transmission or reception in the first sidelink TTI in the sidelink carrier or cell, and determining to perform either the one or more standalone SL CSI-RS transmissions, receptions, or measurements, or the first sidelink data and/or feedback transmission or reception in the first sidelink TTI, at least based on a parameter of a standalone SL CSI-RS.

Abstract: A buffer packing apparatus for packing an object and increasing the buffering capacity between the object and a packaging box is provided. The buffer packing apparatus comprises a U-shaped column body and a pair of buffering sleeves. The two carrier boards in the U-shaped column body support the upper and lower surface of the object. The buffering sleeves are engaged to the respective ends of the U-shaped column body to form a buffering space for protecting the object against external impact. The corners of the buffer packing apparatus are also chamfered to increase the buffering capacity of buffering sleeves when the packaging box receives an external impact.

Abstract: A buffer packing apparatus for packing a plurality of objects is provided. The buffer packing apparatus comprises a plurality of rectangular partition boards and a plurality of buffer columns. The rectangular partition boards form a plurality of compartments for buffering and accommodating the objects. Through the selection of different buffer column designs, orientation of the objects inside the buffer packing apparatus can be easily identified. With chamfers on every corner of the buffer packing apparatus, the shock produced by an external impact can be readily absorbed thereby increasing the buffering capacity of the packing.