Abstract: A universal memory device includes an array of universal memory cells. Each universal memory cell includes a write transistor and a read transistor. The write transistor has a gate terminal configured to receive a gate voltage to turn on or off the write transistor, a first terminal configured to receive a write voltage, and a second terminal coupled to a gate terminal of the read transistor. The read transistor includes a charge trap layer at the gate terminal of the read transistor. The charge trap layer is configured to: be unalterable when the first write voltage is applied at the first terminal of the write transistor, and be alterable when the second write voltage is applied at the first terminal of the write transistor to change a threshold voltage of the read transistor. The second write voltage is greater than the first write voltage.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing forming a first metal-insulator-metal (MIM) capacitor over a substrate and forming a second MIM capacitor over the first MIM capacitor. The forming of the first MIM capacitor includes forming a first conductor plate over a substrate, the first conductor plate comprising a first metal element, conformally depositing a first dielectric layer on the first conductor plate, the first dielectric layer comprising the first metal element, forming a first high-K dielectric layer on the first dielectric layer, conformally depositing a second dielectric layer on the first high-K dielectric layer, the second dielectric layer comprising a second metal element, and forming a second conductor plate over the second dielectric layer, the second conductor plate comprises the second metal element.

Abstract: A semiconductor processing apparatus includes a wafer chuck configured to hold a wafer on a top surface thereof. A plurality of lift-pin holes vertically extends through a chuck body of the wafer chuck. A plurality of lift pins are located in the plurality of lift-pin holes. A plurality of vacuum seal assemblies is located on a bottom portion of a respective one of the plurality of lift pins. Each vacuum seal assembly within the plurality of vacuum seal assemblies includes a respective set of ring segments that are configured to be assembled into a respective contiguous structure under a condition of an upward gas flow within a respective lift-pin hole selected from the plurality of lift-pin holes. Leaks in a vacuum seal between the wafer and the wafer chuck can be remedied by formation of at least one contiguous structure that provides an additional vacuum seal.

Abstract: A rear wheel latching mechanism for a personal transport device and a corresponding personal transport device are provided. The mechanism includes a rear wheel attached to an arm, which includes an inner extrusion that slides on one axis of a fixed frame in a horizontal direction. The fixed frame comprises an outer extrusion that surrounds the inner extrusion. The mechanism also includes a rear wheel cam-latch, configured to lock the inner extrusion and the outer extrusion together. The rear wheel cam-latch allows the rear wheel to articulate when the rear wheel cam-latch is unlatched between a stored state and a deployed state. The mechanism also includes a rear wheel pin that catches and holds the rear wheel in the deployed state to fix a front portion of the inner extrusion and a rear portion of the outer extrusion before the rear wheel cam-latch clamps the inner and outer extrusions together.

Abstract: A semiconductor structure including a first dielectric layer and a conductive pattern is provided. The conductive pattern is disposed in the first dielectric layer, wherein the conductive pattern comprises an alloy layer and a first conductive layer, the alloy layer surrounds sidewalls and a bottom surface of the first conductive layer, a material of the alloy layer comprises an alloy of at least two metals, and at least one of the at least two metals relative to the rest of the at least two metals tends to be reacted with a dielectric material of the first dielectric layer.

Abstract: A mounting bracket for a foldable transport device includes a top portion, a bottom portion, a front wall connecting the top portion and the bottom portion, a first foot peg mounted to the mounting bracket by a first pin and moveably connected to the mounting bracket between a stowed configuration and a riding configuration, and a second foot peg mounted to the mounting bracket by a second pin and moveably connected to the mounting bracket between a stowed configuration and a riding configuration.

Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MaRbXc, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1?a?2, b?1, c?1, and b+c?4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.

Abstract: A memory device includes several computing memory cells each storing a weight value and comprising a first and a second switch elements and a first and a second resistors. The first switch element receives a sensing current and a first input signal related to the input value. The first resistor selectively receives the sensing current through the first switch element in response to the first input signal. The second switch element receives the sensing current and a second input signal related to the input value. The second resistor selectively receives the sensing current through the second switch element in response to the second input signal. When the sensing current flows through the first resistor or the second resistor, the computing memory cell generates a first voltage difference or a second voltage difference corresponding to an output value equal to product of an input value and a weight value.

Abstract: A method for allocating wireless resources based on sensitivity to interference provides a base station controller which, within an area of overlap of adjacent wireless cells, determines a set of neighboring cell pairs from a plurality of cells. The base station controller sorts the set of neighboring cell pairs according to the number of inner-pair interfered user equipment devices of each neighboring cell pair where inner-pair interfered user equipment devices are user equipment devices located in coverage areas of the neighboring cell pair and allocates resource blocks for each neighboring cell pair sequentially based on the sorted set. An apparatus employing the method is also disclosed.

Abstract: A method for allocating wireless resources for a number of user equipment in a wireless communication system is applied in an apparatus. The apparatus collects the traffic demands of all the user equipment and then selects a beam based on the traffic demands of all the user equipment in every time slot to make better utilization of resource blocks.

Abstract: A method for allocating wireless resources based on sensitivity to interference provides a base station controller which, within an area of overlap of adjacent wireless cells, determines a set of neighboring cell pairs from a plurality of cells. The base station controller sorts the set of neighboring cell pairs according to the number of inner-pair interfered user equipment devices of each neighboring cell pair where inner-pair interfered user equipment devices are user equipment devices located in coverage areas of the neighboring cell pair and allocates resource blocks for each neighboring cell pair sequentially based on the sorted set. An apparatus employing the method is also disclosed.

Abstract: A method for allocating wireless resources based on sensitivity to interference provides a base station controller which, within an area of overlap of adjacent wireless cells, determines a set of neighboring cell pairs from a plurality of cells. The base station controller sorts the set of neighboring cell pairs according to the number of inner-pair interfered user equipment devices of each neighboring cell pair where inner-pair interfered user equipment devices are user equipment devices located in coverage areas of the neighboring cell pair and allocates resource blocks for each neighboring cell pair sequentially based on the sorted set. An apparatus employing the method is also disclosed.

Abstract: A method for allocating wireless resources based on sensitivity to interference provides a base station controller which, within an area of overlap of adjacent wireless cells, determines a set of neighboring cell pairs from a plurality of cells. The base station controller sorts the set of neighboring cell pairs according to the number of inner-pair interfered user equipment devices of each neighboring cell pair where inner-pair interfered user equipment devices are user equipment devices located in coverage areas of the neighboring cell pair and allocates resource blocks for each neighboring cell pair sequentially based on the sorted set. An apparatus employing the method is also disclosed.

Abstract: A method for allocating wireless resources for a number of user equipment in a wireless communication system is applied in an apparatus. The apparatus collects the traffic demands of all the user equipment and then selects a beam based on the traffic demands of all the user equipment in every time slot to make better utilization of resource blocks.

Abstract: Disclosed is an antenna device of dipole element with a group of loading metal patches, that includes: a reflector plate; at least one antenna array unit distributed and arranged on the reflector plate; at least one dipole element with group of loading metal patches configured on the reflector plate, spaced from the antenna array unit; said dipole element mainly has the following features: at least one dielectric substrate; at least one resonant arm, configured on the upper section of the dielectric substrate, said resonant arm being in a laterally extending form, having a first side and a second side; at least one continuous metal strip, configured on the first side of the resonant arm; at least one group of loading metal patches, configured on the second side of the resonant arm, having a plurality of load metal patches.

Abstract: A submersible pump capable of providing low voltage power supply comprises a pump body and a filter cover connected to the pump body; a stator containing cavity and a rotor containing cavity is provided in the pump body; the outside of the rotor containing cavity is provided with an impeller room, and the upside of the impeller room is provided with a water outlet; a silicon steel sheet group of a stator and a stator coil are encapsulated in the stator containing cavity in the pump body; a permanent magnet rotor is fixed in the rotor containing cavity in the pump body via a rotor shaft; an impeller at one end of the permanent magnet rotor is located in the impeller room; it also comprises an internal transformer; the internal transformer is provided with a low voltage coil, and the stator coil acting as a high voltage coil, and the two coils are located at the silicon steel sheet group of the stator; the low voltage coil provides AC low voltage power supply to the outside.