Patents by Inventor Minh D. Tran

Minh D. Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7028129
    Abstract: A processor may include a processor core, which interprets and executes instructions, and a system bus interface, which enables the processor to communicate with a system. The system bus interface may include a fill bus and a DMA bus. The system bus interface may include a bridge between the fill bus and the DMA bus which enables the system bus interface to re-route information placed on the fill bus onto the DMA bus and back into the core.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Juan G. Revilla, Minh D. Tran
  • Publication number: 20030126345
    Abstract: A processor may include a processor core, which interprets and executes instructions, and a system bus interface, which enables the processor to communicate with a system. The system bus interface may include a fill bus and a DMA bus. The system bus interface may include a bridge between the fill bus and the DMA bus which enables the system bus interface to re-route information placed on the fill bus onto the DMA bus and back into the core.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: Juan G. Revilla, Minh D. Tran
  • Patent number: 6254784
    Abstract: A centrifuge for continuously separating the various constituents of blood or other biological fluids includes a rotating bowl having high-G and low-G walls. An inwardly directed ramped surface on the high-G wall interacts with an interface region between the separated fluid constituents to provide an optically detectable indication of the position of the interface between the high-G and low-G walls. An optical sensor sensing each passage of the ramped surface past a point develops a changing signal indicative of the interface position. Signal processing circuitry responsive to the signal measures such signal parameters as peak amplitude, signal area and signal shape. By so monitoring these signal parameters, a better indication of actual interface position between the high-G and low-G walls can be obtained. This, in turn, results in better control over centrifuge operation and improved separation of the desired fluid components.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: July 3, 2001
    Assignee: Baxter International Inc.
    Inventors: Abinash Nayak, Clint D. Luckinbill, John T. Foley, Minh D. Tran, James R. Bradley, Timothy J. Patno
  • Patent number: 5506898
    Abstract: In an automatic call distribution (ACD) system, an improved estimated waiting time arrangement derives a more accurate estimate of how long a call that is or may be enqueued in a particular queue will have to wait before being serviced by an agent, by using the average rate of advance of calls through positions of the particular queue. For a dequeued call, the arrangement determines the call's individual rate of advance from one queue position to the next toward the head of the queue. It then uses this individual rate to recompute a weighted average rate of advance through the queue derived from calls that preceded the last-dequeued call through the queue. To derive a particular call's estimated waiting time, the arrangement multiplies the present weighted average rate of advance by the particular call's position number in the queue. The arrangement may be called upon to update the derivation at any time before or while the call is in queue.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: April 9, 1996
    Assignee: AT&T Corp.
    Inventors: Ralph J. Costantini, Andrew D. Flockhart, Cecil W. Maccannon, Jr., James L. Murtaugh, III, Carol Santagato, Minh D. Tran