Abstract: Disclosed is a cleaning robot. The cleaning robot includes a body, a traveling assembly, a rolling brush assembly, a dust suction assembly, a mopping assembly, and a universal wheel. The traveling assembly, the rolling brush assembly, the dust suction assembly, the mopping assembly, and the universal wheel are all arranged on the body. The dust suction assembly includes a dust box. The rolling brush assembly is configured for sweeping garbage on a ground. The dust box is configured for receiving garbage swept by the rolling brush assembly. In an advancing direction of the cleaning robot, the dust box is arranged in front of the rolling brush assembly, and the mopping assembly and/or the universal wheel is arranged behind the rolling brush assembly.

Abstract: A light-emitting structure, comprising: a substrate, and a first metal layer, an insulating layer, an integrated metal layer, and an epitaxial stack, disposed above the substrate. The integrated metal layer is disposed on a surface of the second-type semiconductor layer facing away from the active region, and the integrated metal layer comprises an exposed surface on a side of the integrated metal layer facing the second-type semiconductor layer, the exposed surface being configured to electrically connect with an external driving device.

Abstract: A server heat dissipation system is provided, comprising a liquid cooling server cabinet comprising a cabinet body and multiple liquid cooling servers provided inside the cabinet body, wherein it is provided with a liquid cooling device to perform direct liquid cooling to the liquid cooling servers, and with an auxiliary heat dissipation device to perform auxiliary heat dissipation to the liquid cooling servers. The present invention provides high density cooling, high heat exchange efficiency, no local overheating, small space occupied, high reliability, low noise, and long life.

Abstract: A backlight module and a display apparatus are provided. The backlight module includes: a light bar, a quantum dot encapsulated tube and a light guide plate; the light bar and light guide plate are disposed at two sides of quantum dot encapsulated tube respectively, the light bar and quantum dot encapsulated tube are disposed in parallel, the light bar and quantum dot encapsulated tube are located at a light incident surface side of light guide plate, a plurality of LED lights are disposed on the light bar at a side facing towards the quantum dot encapsulated tube, an LED light corresponding to valid area of quantum dot encapsulated tube is monochromatic LED light, an LED light corresponding to invalid area of quantum dot encapsulated tube is white LED light, and invalid area of quantum dot encapsulated tube is within irradiation range of the white LED light.

Abstract: A back plate component applicable to a display device is disclosed, wherein at least one reinforcement piece is arranged on the back plate component, the reinforcement piece is left-and-right symmetric with respect to a central axis of a length of the back plate component, and a width of the reinforcement piece in a direction of the central axis of the length is decremented from a middle to both of the sides thereof, wherein the central axis of the length of the back plate component is a central axis perpendicular to a length direction of the back plate component and parallel to a width direction of the back plate component.

Abstract: A server heat dissipation system is provided, comprising a liquid cooling server cabinet comprising a cabinet body and multiple liquid cooling servers provided inside the cabinet body, wherein it is provided with a liquid cooling device to perform direct liquid cooling to the liquid cooling servers, and with an auxiliary heat dissipation device to perform auxiliary heat dissipation to the liquid cooling servers. The present invention provides high density cooling, high heat exchange efficiency, no local overheating, small space occupied, high reliability, low noise, and long life.

Abstract: A backlight module and a display apparatus are provided. The backlight module includes: a light bar, a quantum dot encapsulated tube and a light guide plate; the light bar and light guide plate are disposed at two sides of quantum dot encapsulated tube respectively, the light bar and quantum dot encapsulated tube are disposed in parallel, the light bar and quantum dot encapsulated tube are located at a light incident surface side of light guide plate, a plurality of LED lights are disposed on the light bar at a side facing towards the quantum dot encapsulated tube, an LED light corresponding to valid area of quantum dot encapsulated tube is monochromatic LED light, an LED light corresponding to invalid area of quantum dot encapsulated tube is white LED light, and invalid area of quantum dot encapsulated tube is within irradiation range of the white LED light.

Abstract: A back plate component applicable to a display device is disclosed, wherein at least one reinforcement piece is arranged on the back plate component, the reinforcement piece is left-and-right symmetric with respect to a central axis of a length of the back plate component, and a width of the reinforcement piece in a direction of the central axis of the length is decremented from a middle to both of the sides thereof, wherein the central axis of the length of the back plate component is a central axis perpendicular to a length direction of the back plate component and parallel to a width direction of the back plate component.

Abstract: A method for obtaining individual dies from a semiconductor structure is disclosed. The semiconductor structure includes a device layer, and the device layer in turn includes active regions separated by predefined spacings. Thick metal is selectively formed on backside of the device layer such that thick metal is formed on backside of active regions but not on backside of the predefined spacings. The semiconductor structure is then cut along the predefined spacings to separate the active regions with thick metal on their backside into individual dies.

Abstract: A vertical semiconductor device includes a bottom metal layer and a first P-type semiconductor layer overlying the bottom metal layer. The first P-type semiconductor layer is characterized by a surface crystal orientation of (110) and a first conductivity. The first P-type semiconductor layer is heavily doped. The vertical semiconductor device also includes a second P-type semiconductor layer overlying the first P-type semiconductor layer. The second semiconductor layer has a surface crystal orientation of (110) and is characterized by a lower conductivity than the first conductivity. The vertical semiconductor device also has a top metal layer overlying the second P-type semiconductor layer. A current conduction from the top metal layer to the bottom metal layer and through the second p-type semiconductor layer is characterized by a hole mobility along a <110> crystalline orientation and on (110) crystalline plane.

Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.

Abstract: A vertical semiconductor device includes a bottom metal layer and a first P-type semiconductor layer overlying the bottom metal layer. The first P-type semiconductor layer is characterized by a surface crystal orientation of (110) and a first conductivity. The first P-type semiconductor layer is heavily doped. The vertical semiconductor device also includes a second P-type semiconductor layer overlying the first P-type semiconductor layer. The second semiconductor layer has a surface crystal orientation of (110) and is characterized by a lower conductivity than the first conductivity. The vertical semiconductor device also has a top metal layer overlying the second P-type semiconductor layer. A current conduction from the top metal layer to the bottom metal layer and through the second p-type semiconductor layer is characterized by a hole mobility along a <110> crystalline orientation and on (110) crystalline plane.

Abstract: A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support substrate is removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. A vertical semiconductor device structure is formed in and over the (110) silicon layer. The vertical device structure includes a top metal layer and is characterized by a current conduction in a <110> direction. The method includes bonding a second support substrate to the top metal layer and removing the first support substrate using a mechanical grinding and a selective etching process to expose a surface of the P-type heavily doped (110) silicon layer and to allow a metal layer to be formed on the surface.

Abstract: A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.

Abstract: A method for obtaining individual dies from a semiconductor structure is disclosed. The semiconductor structure includes a device layer, and the device layer in turn includes active regions separated by predefined spacings. Thick metal is selectively formed on backside of the device layer such that thick metal is formed on backside of active regions but not on backside of the predefined spacings. The semiconductor structure is then cut along the predefined spacings to separate the active regions with thick metal on their backside into individual dies.

Abstract: A method for obtaining individual dies from a semiconductor structure is disclosed. The semiconductor structure includes a device layer, and the device layer in turn includes active regions separated by predefined spacings. Thick metal is selectively formed on backside of the device layer such that thick metal is formed on backside of active regions but not on backside of the predefined spacings. The semiconductor structure is then cut along the predefined spacings to separate the active regions with thick metal on their backside into individual dies.

Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.

Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.

Abstract: A semiconductor apparatus includes a metal substrate, a doped silicon layer on the metal substrate, a semiconductor layer overlying the doped silicon layer, and semiconductor structures having one or more p-n junctions at least partially within the semiconductor layer formed by using layering, patterning, and doping steps. In an embodiment, the doped silicon layer comprises a heavily doped silicon layer. In another embodiment, the doped silicon region has a thickness that is less than a thickness of a cleavable region formed by ion implantation. In a specific embodiment, the thickness of the cleavable region is about 1-2 um. In another embodiment, the semiconductor layer has a thickness of approximately 10 um. In another embodiment, the semiconductor structures includes a vertical power MOSFET with the metal substrate configured to be a drain terminal contact region.