Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

Abstract: In a system for 360 degree video capture and playback, 360 degree video may be captured, stitched, encoded, decoded, rendered, and played-back. In one or more implementations, a decoding device receives a 360 degree video stream as input and decodes the 360 degree video stream, and a memory device stores the 360 degree video stream and viewing history data associated with the 360 degree video stream. A rendering device may render the decoded stream using view angles from the viewing history data. In one or more implementations, an object tracking device tracks one or more objects in the decoded 360 degree video stream and provides one or more tracking angles associated with the objects. The rendering device may render the decoded 360 degree video stream using the one or more tracking angles to keep at least one object in the 360 degree video stream for one or more rendered frames.

Abstract: In the subject architecture flexible binary arithmetic coding system, coding circuitry of an electronic device may receive video data that is to be coded (e.g., to be encoded or decoded) by binary arithmetic coding. The coding circuitry may also compute at least one of a least probable symbol (LPS) range or a most probable symbol (MPS) range based on a multiplication operation (e.g., without performing a table look-up operation). The coding circuitry may perform binary arithmetic coding on the video data using the at least one of the LPS range or the MPS range. The computation of the LPS range and/or the MPS range using the multiplication operation may have a lower computational cost than using a table look-up operation.

Abstract: From a bit stream, at least the following are decoded: a stereoscopic image of first and second views; a maximum positive disparity between the first and second views; and a minimum negative disparity between the first and second views. In response to the maximum positive disparity violating a limit on positive disparity, a convergence plane of the stereoscopic image is adjusted to comply with the limit on positive disparity. In response to the minimum negative disparity violating a limit on negative disparity, the convergence plane is adjusted to comply with the limit on negative disparity.

Abstract: A method for encoding a video sequence is provided that includes signaling in the compressed bit stream that a subset of a plurality of partitioning modes is used for inter-prediction of a portion of the video sequence, using only the subset of partitioning modes for prediction of the portion of the video sequence, and entropy encoding partitioning mode syntax elements corresponding to the portion of the video sequence, wherein at least one partitioning mode syntax element is binarized according to a pre-determined binarization corresponding to the subset of partitioning modes, wherein the pre-determined binarization differs from a pre-determined binarization for the least one partitioning mode syntax element that would be used if the plurality of partitioning modes is used for inter-prediction.

Abstract: In some aspects, the disclosure is directed to methods and systems for reducing memory utilization and increasing efficiency during affine merge mode for versatile video coding by utilizing motion vectors stored in a motion data line buffer for a prediction unit of a second coding tree unit neighboring a first coding tree unit to derive control point motion vectors for the first coding tree unit.

Abstract: Methods and apparatus for parsing friendly and error resilient merge flag coding in video coding are provided. In some methods, in contrast to merging candidate list size dependent coding of the merge flag in the prior art, a merge flag is always encoded in the encoded bit stream for each inter-predicted prediction unit (PU) that is not encoded using skip mode. In some methods, in contrast to the prior art that allowed the merging candidate list to be empty, one or more zero motion vector merging candidates formatted according to the prediction type of the slice containing a PU are added to the merging candidate list if needed to ensure that the list is not empty and/or to ensure that the list contains a maximum number of merging candidates.

Abstract: Motion compensation requires a significant amount of memory bandwidth, especially for smaller prediction unit sizes. The worst case bandwidth requirements can occur when bi-predicted 4×8 or 8×4 PUs are used. To reduce the memory bandwidth requirements for such smaller PUs, methods are provided for restricting inter-coded PUs of small block sizes to be coded only in a uni-predictive mode, i.e., forward prediction or backward prediction. More specifically, PUs of specified restricted sizes in bi-predicted slices (B slices) are forced to be uni-predicted.

Abstract: A method for adaptive loop filtering of a reconstructed picture in a video encoder is provided that includes determining whether or not sample adaptive offset (SAO) filtering is applied to the reconstructed picture, and using adaptive loop filtering with no offset for the reconstructed picture when the SAO filtering is determined to be applied to the reconstructed picture.

Abstract: A method for encoding a picture of a video sequence in a bit stream that constrains tile processing overhead is provided. The method includes computing a maximum tile rate for the video sequence, computing a maximum number of tiles for the picture based on the maximum tile rate, and encoding the picture wherein a number of tiles used to encode the picture is enforced to be no more than the maximum number of tiles.

Abstract: A method and apparatus for sub-picture based raster scanning coding order. The method includes dividing an image into even sub-pictures, and encoding parallel sub-pictures on multi-cores in raster scanning order within sub-pictures, wherein from core to core, coding of the sub-picture is independent around sub-picture boundaries, and wherein within a core, coding of a sub-picture is at least one of dependent or independent around sub-picture boundaries.

Abstract: A system includes motion vector prediction circuitry that generates motion vectors for pixel groups and pixel subgroups within the pixel groups. For a current pixel group within the currently processed picture, the motion vector prediction circuitry selects a target reference picture. Without first translating the current pixel group in accord with an offset vector, the motion vector prediction circuitry initiates generation of a default motion vector for the current pixel group. Responsive to the selected target reference picture, the motion vector prediction circuitry generates the offset vector. The motion vector prediction circuitry translates the current pixel group in accord with offset vector and determines motion vectors for pixel subgroups of the current pixel group based on the translated position of the current pixel group.

Abstract: In the subject architecture flexible binary arithmetic coding system, coding circuitry of an electronic device may receive video data that is to be coded (e.g., to be encoded or decoded) by binary arithmetic coding. The coding circuitry may also compute at least one of a least probable symbol (LPS) range or a most probable symbol (MPS) range based on a multiplication operation (e.g., without performing a table look-up operation). The coding circuitry may perform binary arithmetic coding on the video data using the at least one of the LPS range or the MPS range. The computation of the LPS range and/or the MPS range using the multiplication operation may have a lower computational cost than using a table look-up operation.

Abstract: Methods are provided for inter-prediction candidate index coding independent of the construction of the corresponding inter-prediction candidate list, i.e., a merging candidate list or an advanced motion vector predictor list. A maximum allowed number of inter-prediction candidates for an inter-prediction candidate list is used for encoding the inter-prediction candidate index in an encoded bit stream. The maximum allowed number may be pre-determined or may be selected by the encoder and encoded in the bit stream. A decoder may then decode the index using the maximum allowed number of inter-prediction candidates independent of the construction of the corresponding inter-prediction candidate list.

Abstract: A method for processing a prediction unit (PU) to generate predicted samples is provided that includes computing predicted samples for samples of the PU using sample-based angular intra-prediction (SAP) when lossless coding is enabled for the PU, and computing predicted samples for the samples of the PU using block-based angular intra-prediction when lossless coding is not enabled for the PU. Computation of the predicted using SAP includes determining an intra-prediction angle for the PU, and computing a predicted sample for each sample of the samples in the PU based on linear interpolation of two reference samples adjacent to the sample, wherein the two reference samples are selected according to the intra-prediction angle.

Abstract: Motion compensation requires a significant amount of memory bandwidth, especially for smaller prediction unit sizes. The worst case bandwidth requirements can occur when bi-predicted 4×8 or 8×4 PUs are used. To reduce the memory bandwidth requirements for such smaller PUs, methods are provided for restricting inter-coded PUs of small block sizes to be coded only in a uni-predictive mode, i.e., forward prediction or backward prediction. More specifically, PUs of specified restricted sizes in bi-predicted slices (B slices) are forced to be uni-predicted.

Abstract: A method and apparatus for a low complexity transform unit partitioning structure for High Efficiency Video Coding (HEVC). The method includes determining prediction unit size of a coding unit, and setting the size of transform unit size of Y, U and V according to the prediction unit size of the coding unit.

Abstract: A method for adaptive loop filtering of a reconstructed picture in a video encoder is provided that includes determining whether or not sample adaptive offset (SAO) filtering is applied to the reconstructed picture, and using adaptive loop filtering with no offset for the reconstructed picture when the SAO filtering is determined to be applied to the reconstructed picture.

Abstract: A method is provided that includes determining a target picture virtual memory access (VMA) bandwidth rate, wherein the target picture VMA bandwidth rate indicates a maximum VMA bandwidth rate for motion compensation of a picture, and verifying the target picture VMA bandwidth rate for a compressed video bit stream.

Abstract: A method and apparatus for sub-picture based raster scanning coding order. The method includes dividing an image into even sub-pictures, and encoding parallel sub-pictures on multi-cores in raster scanning order within sub-pictures, wherein from core to core, coding of the sub-picture is independent around sub-picture boundaries, and wherein within a core, coding of a sub-picture is at least one of dependent or independent around sub-picture boundaries.