Abstract: A semiconductor package includes a first semiconductor chip including a first semiconductor layer, a first through-electrode passing through the first semiconductor layer in a vertical direction, and a first bonding pad connected to the first through-electrode, and a second semiconductor chip including a second semiconductor layer on the first semiconductor chip, a wiring structure between the second semiconductor layer and the first semiconductor chip, a wiring pad connected to the wiring structure below the wiring structure, and a second bonding pad connected to the wiring pad below the wiring pad and in contact with the first bonding pad, wherein the second bonding pad includes a protrusion protruding toward the wiring pad.

Abstract: A semiconductor package comprising a lower structure and an upper structure on the lower structure. The lower structure includes a first semiconductor substrate, first through vias penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads electrically separated from the first through vias and disposed between the first signal pads and a lateral surface of the first semiconductor substrate in a plan view, and a first dielectric layer surrounding the first signal pads and the first dummy pads. The upper structure includes a second semiconductor substrate, second signal pads, second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. Each first signal pad contacts one second signal pad, and each first dummy pad contacts one second dummy pad. A gap is disposed between the first and second dummy pads adjacent to the lateral surface.

Abstract: A semiconductor package includes a first die having signal and dummy regions, and a second die on the first die. The first die includes first dummy patterns arranged in a first direction on the dummy region, second dummy patterns on the dummy region and between the first dummy patterns, a first dielectric layer on the first and second dummy patterns, and first pads extending through the first dielectric layer and coupled to the first dummy patterns. The second die includes second pads on the dummy region, and third pads on the dummy region. On an interface between the first and second dies, the first pads are in contact with the second pads. The first dielectric layer is between the second dummy patterns and the third pads. The first dummy patterns are connected to a ground circuit or power circuit of the first die.

Abstract: A method for manufacturing a window includes providing a base glass, and strengthening the base glass by exposing the base glass to a strengthening molten salt and an additive. The additive contains at least one of Al2(SO4)3, Al(NO3)3, K2SiO3, Na2SiO3, KCl, Ca(NO3)2, and Mg(NO3)2, and a window having good surface compressive stress and excellent surface chemical resistance may thus Ire provided.

Abstract: An apparatus for manufacturing a glass article includes a chamber defining an inner space that accommodates a molten salt for molding and chemical strengthening the glass article, a first electrode disposed in the inner space of the chamber and in contact with the molten salt, a second electrode disposed in the inner space of the chamber, in contact with the molten salt, and facing the first electrode, and a power supply connected to the first electrode and the second electrode.

Abstract: Provided is a lighting assembly including an upper body that defines a top surface thereof; a lower body coupled to a lower portion of the upper body and defining a bottom surface thereof; a light diffusion member coupled to the upper body and the lower body, the light diffusion member including a first surface facing the upper body, a second surface facing the lower body, and a third surface that has a curved surface and is exposed to an outside of the light diffusion member; a light guide made of a light transmissive material, the light guide being in contact with the light diffusion member; and a light-emitting diode (LED) disposed to face a surface of the light guide.

Abstract: Disclosed is a semiconductor package comprising lower and upper structure. The lower structure includes a first semiconductor substrate, first through vias vertically penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads between the first signal pads and electrically separated from the first through vias, and a first dielectric layer surrounding the first signal pads and the first dummy pads. The upper structure includes a second semiconductor substrate, second signal pads and second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. The first signal pad is in contact with one of the second signal pads. The first dummy pad is in contact with one of the second dummy pads. A first interval between the first dummy pads is 0.5 to 1.5 times a second interval between the first signal pads.

Abstract: A semiconductor package includes a first semiconductor chip including a first semiconductor layer, a first through-electrode passing through the first semiconductor layer in a vertical direction, and a first bonding pad connected to the first through-electrode, and a second semiconductor chip including a second semiconductor layer on the first semiconductor chip, a wiring structure between the second semiconductor layer and the first semiconductor chip, a wiring pad connected to the wiring structure below the wiring structure, and a second bonding pad connected to the wiring pad below the wiring pad and in contact with the first bonding pad, wherein the second bonding pad includes a protrusion protruding toward the wiring pad.

Abstract: A display device includes a plurality of pixels disposed on a substrate, in which each pixel includes a first subpixel, a second subpixel adjacent to the first subpixel, and a third subpixel adjacent to the second subpixel, the second subpixel disposed between the first subpixel and the third subpixel. A first color filter is disposed in the first subpixel, and is configured to emit light having a first color, a second color filter is disposed in the second subpixel, and is configured to emit light having a second color, and a third color filter is disposed in the third subpixel, and is configured to emit light having a third color. Further, an upper surface of the second color filter is disposed a greater distance from the substrate than an upper surface of the first color filter.

Abstract: A heat-dissipating device, an electronic device including the heat-dissipating device, and a heat-dissipating method are provided. The heat-dissipating device includes a capillary in which a working fluid is to travel and a capillary-force controller. The capillary includes a first section configured to absorb heat generated by a heat source, a second section spaced from the first section and configured to dissipate the absorbed heat, and a third section connecting the first and second sections. The capillary-force controller is in the third section and is configured to increase or decrease capillary-force such that the working fluid that has absorbed the heat in the first section moves to the second section, and the working fluid that has released the heat in the second section moves back to the first section.

Abstract: A display device having a plurality of driving modes corresponding respectively to a plurality of driving frequencies is disclosed. The display device includes a display panel configured to display an image and including a subpixel connected to a data line, a data driving circuit configured to provide a data voltage or a park voltage to the subpixel via the data line, a power management circuit configured to provide a plurality of driving voltages to the subpixel, and a controller configured to control at least one of the data driving circuit and the power management circuit to change a level of at least one of the park voltage and the plurality of driving voltages based on a change in a current driving frequency from one of the plurality of driving frequencies to one other of the plurality of driving frequencies.

Abstract: A display panel includes a light-reflecting layer arranged on a light-emitting element layer, where at least a portion of light emitted upward from the light-emitting element layer can be reflected back toward a reflective electrode layer that is positioned under the light-emitting element layer.

Abstract: An apparatus for manufacturing a glass article includes a chamber defining an inner space that accommodates a molten salt for molding and chemical strengthening the glass article, a first electrode disposed in the inner space of the chamber and in contact with the molten salt, a second electrode disposed in the inner space of the chamber, in contact with the molten salt, and facing the first electrode, and a power supply connected to the first electrode and the second electrode.

Abstract: A semiconductor device includes a first chip and a second chip stacked on the first chip. The first chip includes a first substrate, a first upper pad on an upper surface of the first substrate, a first upper insulating layer surrounding a lower portion of the first upper pad and a sacrificial layer surrounding an upper portion of the first upper pad. The second chip includes a second substrate, a second upper pad on an upper surface of the second substrate and a second upper insulating layer surrounding the second upper pad, wherein a thickness of the second upper pad is less than a thickness of the first upper pad.

Abstract: A semiconductor package includes a semiconductor chip. The semiconductor chip includes a semiconductor substrate having a first surface and a second surface opposed to each other, an integrated circuit layer on the first surface of the semiconductor substrate, a wiring layer on the integrated circuit layer, a first pad and a second pad horizontally spaced apart from each other on the wiring layer and electrically connected to the wiring layer, a first bonding pad on the first pad and electrically connected to the first pad, a buried insulating pattern on the second pad, and a second bonding pad on the buried insulating pattern. The second bonding pad is electrically isolated from the second pad by the buried insulating pattern.

Abstract: A display apparatus can include a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, a reflective electrode layer including a first reflective electrode of the first sub-pixel, a second reflective electrode of the second sub-pixel, and a third reflective electrode of the third sub-pixel, and an anode electrode layer including a first anode electrode of the first sub-pixel, a second anode electrode of the second sub-pixel, and a third anode electrode of the third sub-pixel. A total thickness of the first reflective electrode and the first anode electrode is equal to a total thickness of the second reflective electrode and the second anode electrode, and is equal to a total thickness of the third reflective electrode and the third anode electrode.

Abstract: A semiconductor device includes a base structure comprising a first bonding pad and a first test pad, and a semiconductor chip comprising a second bonding pad being in contact with the first bonding pad of the base structure and a second test pad being in contact with the first test pad of the base structure. A width of the second bonding pad of the semiconductor chip is less than a width of the second test pad of the semiconductor chip. An air gap is provided between the first test pad of the base structure and the second test pad of the semiconductor chip.

Abstract: The present disclosure provides a system for detecting a defect in a photovoltaic wafer, the system including imaging equipment configured to obtain a target image of a photovoltaic wafer, and a defect detection device configured to determine presence or absence of at least one defect in the photovoltaic wafer in the target image, wherein the defect detection device is further configured to detect the presence or absence of the at least one defect, which includes a defective state with at least one fault in the photovoltaic wafer based on a fault detection deep learning model, and at least one black spot present on the photovoltaic wafer based on a black spot detection algorithm, and a normal state of the photovoltaic wafer.

Abstract: According to an embodiment disclosed herein, an electronic device may comprise a housing structure including a first housing and a second housing, a hinge structure that rotatably connects the first housing and the second housing and is configured to provide at least one folding axis serving as the center of rotation of the first housing or the second housing, and a flexible printed circuit board that extends from the inside of the first housing across the hinge structure and into the second housing. In an embodiment, a region, in the flexible printed circuit board, passing through the hinge structure may include a substrate layer, a shielding layer, and a signal line layer formed between the substrate layer and the shielding layer. In an embodiment, the signal line layer may include a signal line and a ground line that extend along a direction substantially perpendicular to the at least one folding axis and are arranged adjacent to each other.

Abstract: A semiconductor package comprises: a first substrate; a first pad on a top surface of the first substrate; a first conductive pattern on a bottom surface of the first pad; and a semiconductor chip on the top surface of the first substrate, wherein the semiconductor chip comprises: a semiconductor substrate; an interconnection layer on a bottom surface of the semiconductor substrate, the interconnection layer comprising an interconnection pattern; and a bonding pad on a bottom surface of the interconnection pattern, wherein the bonding pad is directly bonded to the first pad, wherein a width of the interconnection pattern is larger than a width of the bonding pad, wherein a width of the first conductive pattern is smaller than a width of the first pad, and wherein the interconnection pattern and the bonding pad comprise different materials.