Patents by Inventor Minna Pirkonen

Minna Pirkonen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11528802
    Abstract: A method of manufacture and an integrated functional multilayer structure, includes a substrate film formed or formable so as to exhibit a selected shape; and a number of functional, preferably including optical, mechanical, optoelectrical, electrical and/or specifically, electronic, elements, such as conductors, insulators, components and/or integrated circuits, provided upon the substrate film in the proximity of the shape; wherein the substrate film has further been provided with a structural tuning element, optionally including an elongated, circumferential or other selected shape, said structural tuning element being configured to locally control induced deformation, optionally including stretching, bending, compression and/or shearing, of the substrate film within said proximity of the shape.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 13, 2022
    Assignee: TACTOTEK OY
    Inventors: Tapio Rautio, Tomi Simula, Minna Pirkonen, Jarkko Torvinen, Tuukka Junkkari, Janne Asikkala, Hasse Sinivaara
  • Patent number: 11166364
    Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 2, 2021
    Assignee: TACTOTEK OY
    Inventors: Antti Keränen, Tomi Simula, Mikko Heikkinen, Jarmo Sääski, Pasi Raappana, Minna Pirkonen
  • Patent number: 11166363
    Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: November 2, 2021
    Assignee: TACTOTEK OY
    Inventors: Antti Keränen, Tomi Simula, Mikko Heikkinen, Jarmo Sääski, Pasi Raappana, Minna Pirkonen
  • Publication number: 20210195731
    Abstract: A method of manufacture and an integrated functional multilayer structure, includes a substrate film formed or formable so as to exhibit a selected shape; and a number of functional, preferably including optical, mechanical, optoelectrical, electrical and/or specifically, electronic, elements, such as conductors, insulators, components and/or integrated circuits, provided upon the substrate film in the proximity of the shape; wherein the substrate film has further been provided with a structural tuning element, optionally including an elongated, circumferential or other selected shape, said structural tuning element being configured to locally control induced deformation, optionally including stretching, bending, compression and/or shearing, of the substrate film within said proximity of the shape.
    Type: Application
    Filed: December 23, 2019
    Publication date: June 24, 2021
    Inventors: Tapio RAUTIO, Tomi Simula, Minna Pirkonen, Jarkko Torvinen, Tuukka Junkkari, Janne Asikkala, Hasse Sinivaara
  • Publication number: 20200229295
    Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 16, 2020
    Inventors: Antti KERÄNEN, Tomi SIMULA, Mikko HEIKKINEN, Jarmo SÄÄSKI, Pasi RAAPPANA, Minna PIRKONEN
  • Publication number: 20200229296
    Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Inventors: Antti KERÄNEN, Tomi SIMULA, Mikko HEIKKINEN, Jarmo SÄÄSKI, Pasi RAAPPANA, Minna PIRKONEN
  • Patent number: 10645796
    Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: May 5, 2020
    Assignee: TACTOTEK OY
    Inventors: Antti Keränen, Tomi Simula, Mikko Heikkinen, Jarmo Sääski, Pasi Raappana, Minna Pirkonen
  • Patent number: 10485094
    Abstract: Integrated multilayer structure suitable for use in sensing applications is disclosed including at least one plastic layer, at least one film layer provided on both sides of the plastic layer. A film layer on a first side of the plastic layer includes electronics incorporating reactance sensing electronics for sensing of selected target quantities, and conversion thereof into representative electrical signals. The sensing electronics include an electrode and a connection element for connecting the electrode to control circuitry. A film layer on a second side of the plastic layer includes features including one conductive feature that is configured to shape an electromagnetic field to adapt a sensitivity or directionality the sensing response of the sensing electronics on the first side of the plastic layer.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: November 19, 2019
    Assignee: TACTOTEK OY
    Inventors: Anne Isohätälä, Hasse Sinivaara, Heikki Tuovinen, Ville Wallenius, Vinski Bräysy, Tomi Simula, Mikko Heikkinen, Minna Pirkonen, Tuukka Junkkari, Jarmo Sääski, Janne Asikkala, Antti Keränen
  • Patent number: 10285261
    Abstract: An electrical node including a first substrate film defining a cavity and a first material layer arranged to at least partly fill the cavity, and to embed or at least partly cover at least one electrical element arranged into the cavity, wherein the first material layer includes elastic material to reduce thermal expansion related stresses between elements adjacent thereto.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 7, 2019
    Assignee: TACTOTEK OY
    Inventors: Tomi Simula, Vinski Bräysy, Mikko Heikkinen, Juha-Matti Hintikka, Juhani Harvela, Minna Pirkonen, Pasi Raappana, Tuomas Heikkilä, Jarmo Sääski
  • Patent number: 10225932
    Abstract: Interface arrangement comprising an electrical node type component for providing electrical or electromagnetic connection between an external system and a host structure of the interface arrangement. The interface arrangement comprising a first substrate film defining a cavity. A first material layer arranged to at least partly fill the cavity and to embed or at least partly cover at least one electrical element at least partly arranged into the cavity. The at least one electrical element comprises at least a converter element configured for adapting signals to be transferred between the external system and electronics of the host structure. A first connection element arranged at least partly into the cavity and configured for connecting to the external system. The first connection element is further at least functionally connected to the converter element. Related multilayer structures and methods of manufacture are presented.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: March 5, 2019
    Assignee: TACTOTEK OY
    Inventors: Tomi Simula, Vinski Bräysy, Mikko Heikkinen, Juha-Matti Hintikka, Minna Pirkonen, Pasi Raappana, Tuomas Heikkilä, Jarmo Sääski, Juhani Harvela
  • Patent number: 10194526
    Abstract: An electrical node, a method, an electrical assembly such as a node strip or sheet, a related multilayer structure, and a method of manufacture are presented. The electrical node comprises a first substrate film defining a cavity and a first material layer arranged to at least partly fill the cavity and to embed or at least partly cover at least one electrical element arranged into the cavity.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: January 29, 2019
    Assignee: TACTOTEK OY
    Inventors: Tomi Simula, Vinski Bräysy, Mikko Heikkinen, Juha-Matti Hintikka, Juhani Harvela, Minna Pirkonen, Pasi Raappana, Tuomas Heikkilä, Jarmo Sääski