Patents by Inventor Minobu Abe

Minobu Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060123077
    Abstract: A communication systems (100) comprises terminals (103, 104) and an intermediate server (101) that notifies destination information for determining the address of the second communication terminal on the network. The terminal (103) transmits to the intermediate server (101) a request message for requesting the destination information.
    Type: Application
    Filed: February 4, 2004
    Publication date: June 8, 2006
    Inventors: Toshihiko Munetsugu, Kenichi Nagatomo, Minobu Abe
  • Publication number: 20050125564
    Abstract: The middleware discoverable service allows extensive dynamic profiling with respect to devices, control points and users. An XML-based discoverable service implements SOAP control and is capable of GENA eventing. This is made possible through a profiling service, compliant with UPnP protocols, which manages profile objects containing profile information of devices, users and/or services. Control points on the UPnP network may subscribe to the profiling service to receive up-to-date information about relevant profile information.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Dennis Bushmitch, Minobu Abe
  • Publication number: 20040184479
    Abstract: The present invention provides a packet routing device capable of converting packet data complying with one of a plurality of secure protocols received via an external network into the one complying with a secure protocol used for a home network at home.
    Type: Application
    Filed: August 4, 2003
    Publication date: September 23, 2004
    Inventors: Hiroki Yamauchi, Minobu Abe
  • Patent number: 6271850
    Abstract: The present invention provides an image generation/composition apparatus and method capable of performing an anti-aliasing process or translucency process, and capable of obtaining a high quality image from shape data comprising coordinate values representing a three-dimensional shape without requiring an increase in cost.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: August 7, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuteru Kida, Tadashi Kobayashi, Akio Nishimura, Minobu Abe
  • Patent number: 5761401
    Abstract: An apparatus for parallel image generation has four geometric data buffers for storing four partial geometric data, respectively, and four image generators connected respectively to the four geometric data buffers. Each image generator generates a partial image data for every pixel in a frame. Further provided are four image mergers connected respectively to the four image generators. The four image mergers are also connected in series. An initial image generator for generating a background image is connected to the first image merger for merging the background image data and the partial image data from the first image generator. Each of the second to fourth image merger merges an output merged data from the previous image merger and the partial image data from the corresponding image generator.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: June 2, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadashi Kobayashi, Akio Nishimura, Yorihiko Wakayama, Kiyoshi Maenobu, Kazu Segawa, Makoto Hirai, Kenji Nishimura, Toshiya Naka, Jiro Minehisa, Minobu Abe
  • Patent number: 5519877
    Abstract: Disclosed is an apparatus of synchronizing parallel processing among a plurality of processors including a plurality of synchronization units respectively corresponding to the plurality of processors and a control unit. The control unit and the synchronization units are connected in a loop. Each synchronization unit outputs a sync signal for informing that the synchronization unit has entered a wait state to an adjacent downstream unit. The control unit outputs a pulse for informing a completion of a synchronization among the processors to an uppermost-stream synchronization unit. The pulse is forwarded as far as an lowermost-stream synchronization unit.
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: May 21, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Yoneda, Shinichi Saeki, Noriyuki Hidaka, Minobu Abe