Patents by Inventor Minori Kamada

Minori Kamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8263319
    Abstract: A manufacturing method for a plasma display member wherein generation of defects such as interruption and short-circuit of a pattern obtained after exposure and development is suppressed and yield is improved, even when a foreign material is adhered on a photo mask or photo mask is scratched. An exposing method for a display member wherein a display member having a photosensitive layer formed on a base substrate is exposed through a photo mask having a desired pattern. The exposing method for the display member is characterized in that the photo mask and the base substrate are relatively shifted during exposure operation.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: September 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Tetsuo Uchida, Yoshiyuki Tsuji, Yuichiro Iguchi, Minori Kamada
  • Patent number: 8154203
    Abstract: A plasma display member does not cause an erroneous discharge in a display region end portion and includes: a substrate (1); a substantially stripe-shaped address electrode (2) arranged on the substrate (1); a dielectric layer (3) covering the address electrode (2) and a grid-shaped partition arranged on the dielectric layer (3) and having main walls (4) substantially parallel to the address electrode (2) and auxiliary walls (5) intersecting the main partitions (4). The auxiliary wall (5) intersecting the main wall (4) located at the outermost position among the main walls (4) located at non-display regions (7) at the right and left of a display region (6) has a bottom width identical to the bottom width (L1) of the main wall (4) located at the outermost position among the main walls (4) located at the non-display regions (7) at the right and left of the display region (6) which is multiplied by 0.3 to 1.0.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: April 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Minori Kamada, Kenichi Kawabe
  • Publication number: 20110140600
    Abstract: A plasma display member does not cause an erroneous discharge in a display region end portion and includes: a substrate (1); a substantially stripe-shaped address electrode (2) arranged on the substrate (1); a dielectric layer (3) covering the address electrode (2) and a grid-shaped partition arranged on the dielectric layer (3) and having main walls (4) substantially parallel to the address electrode (2) and auxiliary walls (5) intersecting the main partitions (4). The auxiliary wall (5) intersecting the main wall (4) located at the outermost position among the main walls (4) located at non-display regions (7) at the right and left of a display region (6) has a bottom width identical to the bottom width (L1) of the main wall (4) located at the outermost position among the main walls (4) located at the non-display regions (7) at the right and left of the display region (6) which is multiplied by 0.3 to 1.0.
    Type: Application
    Filed: July 30, 2007
    Publication date: June 16, 2011
    Inventors: Minori Kamada, Kenichi Kawabe
  • Publication number: 20090218945
    Abstract: [PROBLEMS] To provide a member for plasma display having a lattice-like partition consisting of at least a main partition and an auxiliary partition formed on a substrate in which the height at the partition of the main partition is prevented from becoming smaller than the height at an intersection even when a high precision lattice-like partition where the width at the top of the main partition becomes 40 ?m or less is provided, and the problem of erroneous emission of light from a cell is eliminated. [MEANS FOR SOLVING PROBLEMS] In a structure where the width at the top of the main partition is 40 ?m or less and the main and auxiliary partitions are arranged in lattice, the height at the intersection of the main and auxiliary partitions is set to be 0-2? smaller than the height at the main partition by setting the relation between the width (Wa) at the top of the main partition and the width (Wb) at the top of the auxiliary partition to satisfy 1.2?(Wa/Wb).
    Type: Application
    Filed: February 19, 2007
    Publication date: September 3, 2009
    Inventors: Minori Kamada, Yoshiyuki Tsuji, Atsushi Kondo
  • Publication number: 20090142703
    Abstract: A manufacturing method for a plasma display member wherein generation of defects such as interruption and short-circuit of a pattern obtained after exposure and development is suppressed and yield is improved, even when a foreign material is adhered on a photomask or photomask is scratched. An exposing method for a display member wherein a display member having a photosensitive layer formed on a base substrate is exposed through a photomask having a desired pattern. The exposing method for the display member is characterized in that the photomask and the base substrate are relatively shifted during exposure operation.
    Type: Application
    Filed: August 26, 2005
    Publication date: June 4, 2009
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Tetsuo Uchida, Yoshiyuki Tsuji, Yuichiro Iguchi, Minori Kamada