Patents by Inventor Minoru Akutsu
Minoru Akutsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190280101Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: ApplicationFiled: May 23, 2019Publication date: September 12, 2019Applicant: ROHM CO., LTD.Inventors: Shinya TAKADO, Minoru AKUTSU, Taketoshi TANAKA, Norikazu ITO
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Publication number: 20190207023Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) interveneType: ApplicationFiled: March 7, 2019Publication date: July 4, 2019Inventors: Kenji YAMAMOTO, Tetsuya FUJIWARA, Minoru AKUTSU, Ken NAKAHARA, Norikazu ITO
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Publication number: 20190207022Abstract: A semiconductor device includes: a back barrier layer containing AlXGa(1-X)N (0<X?1); an electron transit layer containing AlaInbGa(1-a-b)N (0?a+b?1) and formed on the back barrier layer; a top barrier layer containing AlYGa(1-Y)N (0<Y?1) and formed on the electron transit layer; an electron supply layer containing AlZGa(1-Z)N (0<Z?1) and formed on the top barrier layer, the electron supply layer having an opening to expose the top barrier layer; a two-dimensional electron gas region formed in an area of a surface layer portion of the electron transit layer, the area opposing the electron supply layer with the top barrier layer interposed between the electron supply layer and the area; a gate insulating layer formed in the opening of the electron supply layer; and a gate electrode layer formed on the gate insulating layer and opposing the electron transit layer with the gate insulating layer interposed therebetween.Type: ApplicationFiled: December 26, 2018Publication date: July 4, 2019Inventors: Kazuya NAGASE, Shinya TAKADO, Minoru AKUTSU
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Patent number: 10340360Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: GrantFiled: February 26, 2018Date of Patent: July 2, 2019Assignee: ROHM CO., LTD.Inventors: Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
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Patent number: 10256335Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) interveneType: GrantFiled: August 8, 2017Date of Patent: April 9, 2019Assignee: ROHM CO., LTD.Inventors: Kenji Yamamoto, Tetsuya Fujiwara, Minoru Akutsu, Ken Nakahara, Norikazu Ito
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Patent number: 10038070Abstract: A nitride semiconductor device according to the present invention includes a nitride semiconductor layer including an electron transit layer and an electron supply layer which is in contact with the electron transit layer and which has a composition different from that of the electron transit layer, a gate electrode on the nitride semiconductor layer and a gate insulating film between the gate electrode and the nitride semiconductor layer. A region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a deep acceptor concentration equal to or more than 1.0×1016 cm?3.Type: GrantFiled: August 9, 2016Date of Patent: July 31, 2018Assignee: ROHM CO., LTD.Inventors: Taketoshi Tanaka, Minoru Akutsu, Norikazu Ito
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Publication number: 20180190790Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: ApplicationFiled: February 26, 2018Publication date: July 5, 2018Applicant: ROHM CO., LTD.Inventors: Shinya TAKADO, Minoru AKUTSU, Taketoshi TANAKA, Norikazu ITO
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Patent number: 9905669Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: GrantFiled: October 6, 2016Date of Patent: February 27, 2018Assignee: ROHM CO., LTD.Inventors: Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
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Patent number: 9837521Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) interveneType: GrantFiled: October 7, 2013Date of Patent: December 5, 2017Assignee: ROHM CO., LTD.Inventors: Kenji Yamamoto, Tetsuya Fujiwara, Minoru Akutsu, Ken Nakahara, Norikazu Ito
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Publication number: 20170338333Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) interveneType: ApplicationFiled: August 8, 2017Publication date: November 23, 2017Inventors: Kenji YAMAMOTO, Tetsuya FUJIWARA, Minoru AKUTSU, Ken NAKAHARA, Norikazu ITO
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Patent number: 9704982Abstract: A semiconductor device comprises a Group III nitride semiconductor lamination structure including a hetero-junction; an insulating layer formed on the Group III nitride semiconductor lamination structure, the insulating layer including a gate opening portion extending to the Group III nitride semiconductor lamination structure; a gate insulating film configured to cover a bottom portion and a side portion of the gate opening portion; a gate electrode formed on the gate insulating film in the gate opening portion; a source electrode and a drain electrode disposed in a spaced-apart relationship with the gate electrode to sandwich the gate electrode and electrically connected to the Group III nitride semiconductor lamination structure; and a conductive layer embedded in the insulating layer between the gate electrode and the drain electrode and insulated from the gate electrode by the gate insulating film, the conductive layer electrically connected to the source electrode.Type: GrantFiled: January 21, 2016Date of Patent: July 11, 2017Assignee: ROHM CO., LTD.Inventors: Kentaro Chikamatsu, Taketoshi Tanaka, Minoru Akutsu
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Publication number: 20170104093Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: ApplicationFiled: October 6, 2016Publication date: April 13, 2017Applicant: ROHM CO., LTD.Inventors: Shinya TAKADO, Minoru AKUTSU, Taketoshi TANAKA, Norikazu ITO
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Publication number: 20170047412Abstract: A nitride semiconductor device according to the present invention includes a nitride semiconductor layer including an electron transit layer and an electron supply layer which is in contact with the electron transit layer and which has a composition different from that of the electron transit layer, a gate electrode on the nitride semiconductor layer and a gate insulating film between the gate electrode and the nitride semiconductor layer. A region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a deep acceptor concentration equal to or more than 1.0×1016 cm?3.Type: ApplicationFiled: August 9, 2016Publication date: February 16, 2017Applicant: ROHM CO., LTD.Inventors: Taketoshi TANAKA, Minoru AKUTSU, Norikazu ITO
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Patent number: 9564739Abstract: A semiconductor laser device capable of high output is provided. A semiconductor laser diode includes: a substrate; and a semiconductor stacked structure, which is formed on the substrate through crystal growth. The semiconductor stacked structure includes: an n-type (Alx1Ga(1-x1))0.51In0.49P cladding layer and a p-type (Alx1Ga(1-x1))0.51In0.49P cladding layer; an n-side Alx2Ga(1-x2)As guiding layer and a p-side Alx2Ga(1-x2)As guiding layer, which are sandwiched between the cladding layers; and an active layer, which is sandwiched between the guiding layers. The active layer is formed of a quantum well layer including an AlyGa(1-y)As(1-x3)Px3 layer and a barrier layer including an Alx4Ga(1-x4)As layer that are alternatively repetitively stacked for a plurality of periods.Type: GrantFiled: February 19, 2016Date of Patent: February 7, 2017Assignee: ROHM CO., LTDInventors: Tsuguki Noma, Minoru Akutsu, Yoshito Nishioka
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Publication number: 20160218203Abstract: A semiconductor device comprises a Group III nitride semiconductor lamination structure including a hetero-junction; an insulating layer formed on the Group III nitride semiconductor lamination structure, the insulating layer including a gate opening portion extending to the Group III nitride semiconductor lamination structure; a gate insulating film configured to cover a bottom portion and a side portion of the gate opening portion; a gate electrode formed on the gate insulating film in the gate opening portion; a source electrode and a drain electrode disposed in a spaced-apart relationship with the gate electrode to sandwich the gate electrode and electrically connected to the Group III nitride semiconductor lamination structure; and a conductive layer embedded in the insulating layer between the gate electrode and the drain electrode and insulated from the gate electrode by the gate insulating film, the conductive layer electrically connected to the source electrode.Type: ApplicationFiled: January 21, 2016Publication date: July 28, 2016Applicant: ROHM CO., LTD.Inventors: Kentaro CHIKAMATSU, Taketoshi TANAKA, Minoru AKUTSU
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Publication number: 20160211651Abstract: A semiconductor laser device capable of high output is provided. A semiconductor laser diode includes: a substrate; and a semiconductor stacked structure, which is formed on the substrate through crystal growth. The semiconductor stacked structure includes: an n-type (Alx1Ga(1-x1))0.51In0.49P cladding layer and a p-type (Alx1Ga(1-x1))0.51In0.49P cladding layer; an n-side Alx2Ga(1-x2)As guiding layer and a p-side Alx2Ga(1-x2)As guiding layer, which are sandwiched between the cladding layers; and an active layer, which is sandwiched between the guiding layers. The active layer is formed of a quantum well layer including an AlyGa(1-y)As(1-x3)Px3 layer and a barrier layer including an Alx4Ga(1-x4)As layer that are alternatively repetitively stacked for a plurality of periods.Type: ApplicationFiled: February 19, 2016Publication date: July 21, 2016Applicant: ROHM CO., LTD.Inventors: Tsuguki NOMA, Minoru AKUTSU, Yoshito NISHIOKA
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Patent number: 9356432Abstract: A semiconductor laser device capable of high output is provided. A semiconductor laser diode includes: a substrate; and a semiconductor stacked structure, which is formed on the substrate through crystal growth. The semiconductor stacked structure includes: an n-type (Alx1Ga1-x1))0.51In0.49P cladding layer and a p-type (Alx1Ga(1-x1))0.51In0.49P cladding layer; an n-side Alx2Ga(1-x2)As guiding layer and a p-side Alx2Ga(1-x2)As guiding layer, which are sandwiched between the cladding layers; and an active layer, which is sandwiched between the guiding layers. The active layer is formed of a quantum well layer including an AlyGa(1-y)As(1-x3)Px3 layer and a barrier layer including an Alx4Ga(1-x4)As layer that are alternatively repetitively stacked for a plurality of periods.Type: GrantFiled: February 21, 2014Date of Patent: May 31, 2016Assignee: ROHM CO., LTD.Inventors: Tsuguki Noma, Minoru Akutsu, Yoshito Nishioka
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Patent number: 9293573Abstract: Provided are a nitride semiconductor device having an excellent boundary between a nitride semiconductor and a gate insulating film, resulting in improved device characteristics, and a manufacturing method therefor.Type: GrantFiled: May 21, 2013Date of Patent: March 22, 2016Assignee: ROHM CO., LTD.Inventors: Minoru Akutsu, Tetsuya Fujiwara
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Publication number: 20150279982Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) interveneType: ApplicationFiled: October 7, 2013Publication date: October 1, 2015Inventors: Kenji Yamamoto, Tetsuya Fujiwara, Minoru Akutsu, Ken Nakahara, Norikazu Ito
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Patent number: 8823819Abstract: An apparatus for measuring the position and shape of a pattern formed on a sheet includes a sheet on which a pattern is formed, a camera holding mechanism that is disposed perpendicular to a transportation direction of the sheet, at least one camera that is disposed such that the camera is movable in a longitudinal direction of the camera holding mechanism, and an image processing computer that processes an image picked up by the at least one camera. In the measuring apparatus, when calibration is performed, calibration is performed with reference to a picked up image of the coating pattern and a picked up image of a reference body for calibration.Type: GrantFiled: September 22, 2011Date of Patent: September 2, 2014Assignee: Yokogawa Electric CorporationInventors: Yasushi Ichizawa, Naomichi Chida, Minoru Akutsu