Patents by Inventor Minoru Ikegami

Minoru Ikegami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6954249
    Abstract: In a liquid crystal display device for displaying a visible image by controlling the alignment of a liquid crystal disposed between a pair of transparent substrates (1a, 1b), a resistance element (8, 13, 18, 28, 40) for changing a voltage which will be imposed in the liquid crystal is directly formed on the transparent substrate (1a) by ITO or the like. One or ones of the resistance branches (8a) of a resistance pattern (8) are cut off by a laser beam to thereby change the resistance value of the resistance pattern (8) so that a voltage which will be imposed on the liquid crystal is adjusted. A peripheral circuit including a capacitor and/or the like may be directly formed on the transparent substrate (1a) in addition to the resistance pattern (8). The peripheral circuit may be formed to a portion located between the pair of transparent substrates (1a, 1b).
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: October 11, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Eiji Muramatsu, Shigetoshi Yamada, Minoru Ikegami
  • Publication number: 20020060767
    Abstract: In a liquid crystal display device for displaying a visible image by controlling the alignment of a liquid crystal disposed between a pair of transparent substrates (1a, 1b), a resistance element (8, 13, 18, 28, 40) for changing a voltage which will be imposed in the liquid crystal is directly formed on the transparent substrate (1a) by ITO or the like. One or ones of the resistance branches (8a) of a resistance pattern (8) are cut off by a laser beam to thereby change the resistance value of the resistance pattern (8) so that a voltage which will be imposed on the liquid crystal is adjusted. A peripheral circuit including a capacitor and/or the like may be directly formed on the transparent substrate (1a) in addition to the resistance pattern (8). The peripheral circuit may be formed to a portion located between the pair of transparent substrates (1a, 1b).
    Type: Application
    Filed: March 8, 1999
    Publication date: May 23, 2002
    Inventors: EIJI MURAMATSU, SHIGETOSHI YAMADA, MINORU IKEGAMI