Patents by Inventor Minoru Mitsuhashi

Minoru Mitsuhashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955500
    Abstract: There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: April 9, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Reijiroh Shohji, Masaki Haneda, Hiroshi Horikoshi, Minoru Ishida, Takatoshi Kameshima, Ikue Mitsuhashi, Hideto Hashiguchi, Tadashi Iijima
  • Patent number: 11948961
    Abstract: A solid-state imaging device including a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked, a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked, and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. A first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate to each other does not include a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 2, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 4840304
    Abstract: A process for manufacturing the butt-welded cans comprises the steps of applying a 0.5 to 3.5 .mu.m thick organic resin film for preventing the adhesion of melted metal particles to at least a 1-mm-wide region from the butt-weld portion edge of at least the inner surface of a steel plate can blank, and butt-welding the edges of the can blank by the use of a laser, or alternatively applying a 0.5 to 7.0.mu.m thick organic resin film, butting the edges of the can blank, and laser-welding the butted edges while a cooling device is brought into contact with the butted edges from the inner side of each can. In this case, it is preferred that the coating material having high thermal decomposition resistance is applied to the whole outer surface of each can, and the weld portion is then butt-welded by means of a CO.sub.2 laser.
    Type: Grant
    Filed: September 2, 1988
    Date of Patent: June 20, 1989
    Assignee: Toyo Seikan Kaisha Ltd.
    Inventors: Nobuyuki Sato, Hiroshi Matsubayashi, Seishichi Kobayashi, Minoru Mitsuhashi, Kenji Matsuno, Kazuhisa Ishibashi
  • Patent number: 4805795
    Abstract: There is here provided butt-welded cans made of steel plates having a carbon concentration of 0.02 to 0.09% by weight, the aforesaid butt-welded cans being characterized in that a coating film for preventing the adhesion of melted metal particles is applied to at least the inner surface of the weld portion and its vicinity of each can, and a carbon concentration index I of the weld portion satisfies the formula (1)I=(Iw/Ic).times.10.sup.3 .ltoreq.15 (1)wherein Iw is a K.alpha. X ray intensity, of carbon in the weld portion, measured by the EPMA method, andIc is a K.alpha. X ray intensity, of carbon in graphite, measured by the EPMA method.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: February 21, 1989
    Assignee: Toyo Seikan Kaisha Ltd.
    Inventors: Nobuyuki Sato, Hiroshi Matsubayashi, Seishichi Kobayashi, Minoru Mitsuhashi, Kenji Matsuno, Kazuhisa Ishibashi
  • Patent number: 4420454
    Abstract: The peripheral portion of a flat, molecularly orientable material stock of substantially uniform thickness having a temperature below the upper limit of the molecularly orientable temperatures of the plastic material is clamped, and the central portion of the plastic material stock is introduced into a die cavity while compressing the central portion with an upper plunger and a lower plunger, thereby forming a hollow preform having a sidewall portion made from the plastic material which has been forced out from between the upper plunger and the lower plunger, while the sidewall portion is kept in contact with the side surface of the upper plunger kept at about molecularly orientable temperature.
    Type: Grant
    Filed: March 5, 1982
    Date of Patent: December 13, 1983
    Assignee: Toyo Seikan Kaisha, Limited
    Inventors: Kiyoshi Kawaguchi, Muneki Yamada, Nobuyuki Kato, Fumio Kanou, Akira Sakamoto, Minoru Mitsuhashi