Patents by Inventor Minoru Morinaga

Minoru Morinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7196393
    Abstract: A drain diffusion layer 11b includes a low impurity concentration region 5a and a high impurity concentration region 5b, and the low impurity concentration region 5a is located on the channel region side. An impurity layer 7 having an opposite conductivity type to the drain diffusion layer 11b is formed in the channel region, at a position away from the low impurity concentration region 5a by a distance T. Alternatively, the low impurity concentration region 5a and the impurity layer 7 are located so as to contact each other. Still alternatively, a border impurity layer is provided between the low impurity concentration region 5a and the impurity layer 7. Thus, a semiconductor device including a high voltage transistor capable of suppressing the reduction of the electric current driving capability and performing stable driving, and a method for fabricating the same, can be provided.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: March 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Suzuki, Minoru Morinaga, Yukihiro Inoue
  • Publication number: 20050199962
    Abstract: A drain diffusion layer 11b includes a low impurity concentration region 5a and a high impurity concentration region 5b, and the low impurity concentration region 5a is located on the channel region side. An impurity layer 7 having an opposite conductivity type to the drain diffusion layer 11b is formed in the channel region, at a position away from the low impurity concentration region 5a by a distance T. Alternatively, the low impurity concentration region 5a and the impurity layer 7 are located so as to contact each other. Still alternatively, a border impurity layer is provided between the low impurity concentration region 5a and the impurity layer 7. Thus, a semiconductor device including a high voltage transistor capable of suppressing the reduction of the electric current driving capability and performing stable driving, and a method for fabricating the same, can be provided.
    Type: Application
    Filed: March 7, 2005
    Publication date: September 15, 2005
    Inventors: Mitsuhiro Suzuki, Minoru Morinaga, Yukihiro Inoue