Patents by Inventor Minoru Ohkawa

Minoru Ohkawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5602778
    Abstract: A collective erasure type nonvolatile semiconductor memory device which allows use of redundant structure to word lines is provided. A row address buffer having address converting function simultaneously selects a plurality of physically adjacent word lines from a memory array in programming before erasure. Programming before erasure is effected on the memory cells on the simultaneously selected word lines. Even when physically adjacent word lines are short-circuited between each other, programming high voltage can be transmitted to the defective word lines, as these word lines are selected simultaneously. Therefore, the memory cells on the defective word lines can be programmed before erasure, so that over erasure at the time of collective erasing operation can be prevented. Thus, redundant structure for replacing defecting word lines by spare word lines can be utilized.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: February 11, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomoshi Futatsuya, Masaaki Mihara, Yasushi Terada, Takeshi Nakayama, Yoshikazu Miyawaki, Shinichi Kobayashi, Minoru Ohkawa
  • Patent number: 5563824
    Abstract: A source line of a memory array included in a flash memory is set to a 3V potential by a source line circuit, a power supply voltage of 6V is applied to a sense amplifier, and 3V is applied as the ground potential. After the setting of such potential conditions, reading of the memory array is performed. When current flows to the memory cells as a result of reading, it means that the memory cell has been erased. If the current does not flows through the memory cell, erasure pulse is applied again and every memory cell is verified.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: October 8, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshikazu Miyawaki, Takeshi Nakayama, Masaaki Mihara, Shinji Kawai, Minoru Ohkawa
  • Patent number: 5548557
    Abstract: A collective erasure type nonvolatile semiconductor memory device which allows use of redundant structure to word lines is provided. A row address buffer having address converting function simultaneously selects a plurality of physically adjacent word lines from a memory array in programming before erasure. Programming before erasure is effected on the memory cells on the simultaneously selected word lines. Even when physically adjacent word lines are short-circuited between each other, programming high voltage can be transmitted to the defective word lines, as these word lines are selected simultaneously. Therefore, the memory cells on the defective word lines can be programmed before erasure, so that over erasure at the time of collective erasing operation can be prevented. Thus, redundant structure for replacing defecting word lines by spare word lines can be utilized.
    Type: Grant
    Filed: January 11, 1994
    Date of Patent: August 20, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomoshi Futatsuya, Masaaki Mihara, Yasushi Terada, Takeshi Nakayama, Yoshikazu Miyawaki, Shinichi Kobayashi, Minoru Ohkawa