Patents by Inventor Minoru Saeki
Minoru Saeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10223110Abstract: There is a need to provide a central processing unit capable of improving the resistance to power analysis attack without changing programs, lowering clock frequencies, and greatly redesigning a central processing unit of the related art. In a central processing unit, an arithmetic unit is capable of performing arithmetic operation using data irrelevant to data stored in a register group. A control unit allows the arithmetic unit to perform arithmetic processing corresponding to an incorporated instruction. At this time, the control unit allows the arithmetic unit to perform arithmetic processing using the irrelevant data during a first one-clock cycle.Type: GrantFiled: August 29, 2013Date of Patent: March 5, 2019Assignee: Renesas Electronics CorporationInventor: Minoru Saeki
-
Publication number: 20180069874Abstract: The present invention relates to an attack detection apparatus that detects an attack against a communication network between devices, and improves information security of the communication network. The attack detection apparatus has a CAN (Controller Area Network) that transfers a signal to a plurality of nodes by a differential voltage between two signal lines, and a short circuit detector that monitors the signal transferred by the two signal lines of the CAN, and detects a short circuit between the two signal lines on the basis of a change in the signal indicating a characteristic of a short circuit attack by an unauthorized node.Type: ApplicationFiled: May 15, 2015Publication date: March 8, 2018Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Minoru SAEKI, Takeshi SUGAWARA
-
Publication number: 20150338878Abstract: There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.Type: ApplicationFiled: August 5, 2015Publication date: November 26, 2015Inventors: Daisuke SUZUKI, Minoru SAEKI, Yuichiro NARIYOSHI
-
Patent number: 9116693Abstract: There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.Type: GrantFiled: April 10, 2012Date of Patent: August 25, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Daisuke Suzuki, Minoru Saeki, Yuichiro Nariyoshi
-
Publication number: 20140068231Abstract: There is a need to provide a central processing unit capable of improving the resistance to power analysis attack without changing programs, lowering clock frequencies, and greatly redesigning a central processing unit of the related art. In a central processing unit, an arithmetic unit is capable of performing arithmetic operation using data irrelevant to data stored in a register group. A control unit allows the arithmetic unit to perform arithmetic processing corresponding to an incorporated instruction. At this time, the control unit allows the arithmetic unit to perform arithmetic processing using the irrelevant data during a first one-clock cycle.Type: ApplicationFiled: August 29, 2013Publication date: March 6, 2014Applicant: Renesas Electronics CorporationInventor: Minoru SAEKI
-
Patent number: 8577942Abstract: An electronic device that defends against an attack trying to identify confidential information from power consumption is provided without any circuit that performs a complementary operation to eliminate bias in power consumption. An elementary device A 100 is formed by a plurality of transistors 101-112. The elementary device A 100 receives inputs signals x1, x2, a random number r, and a control signal en, and outputs z. The output z is obtained by XORing (x1^r)&(x2^r) with the random number r. After the state transitions of the input signal, x1, x2, and the random number r, are settled, the control signal en is used to output z. This makes the signal transition rate of the output z equal, thereby defending against an attack trying to identify confidential information from power consumption.Type: GrantFiled: July 7, 2004Date of Patent: November 5, 2013Assignee: Mitsubishi Electric CorporationInventors: Daisuke Suzuki, Minoru Saeki
-
Patent number: 8417430Abstract: A following distance control device includes a vehicle speed detecting device that detects the vehicle speed VSPD of an own vehicle and outputs a vehicle speed equal to or less than a predetermined speed as zero, a following distance detecting device that detects a following distance between a preceding vehicle and the own vehicle, a first requested acceleration computing device that computes a requested acceleration GBASE from the vehicle speed and the following distance, and a stop determining device that determines the stop of the own vehicle, on the basis of a requested acceleration Greq_pre_0 kph at a time point when the output value of the vehicle speed detecting device becomes zero.Type: GrantFiled: June 3, 2008Date of Patent: April 9, 2013Assignee: Toyota Jidosha Kabushiki KaishaInventor: Minoru Saeki
-
Publication number: 20120198211Abstract: There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.Type: ApplicationFiled: April 10, 2012Publication date: August 2, 2012Applicant: Renesas Electronics CorporationInventors: Daisuke SUZUKI, Minoru Saeki, Yuichiro Nariyoshi
-
Patent number: 8219847Abstract: There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.Type: GrantFiled: October 23, 2009Date of Patent: July 10, 2012Assignee: Renesas Electronics CorporationInventors: Daisuke Suzuki, Minoru Saeki, Yuichiro Nariyoshi
-
Patent number: 8195360Abstract: A curve radius estimating device (100) configured to estimate a curve radius of a lane on which a self vehicle is driving includes a first curve radius calculating part (110) configured to calculate a first curve radius on a steering angle, a second curve radius calculating part (111) configured to calculate a second curve radius on a yaw rate, and a curve radius estimating part (112) configured to estimate a curve radius by combining the first curve radius and the second curve radius at a predetermined combination ratio. The curve radius estimating part (112) changes the predetermined combination ratio depending on a vehicle speed.Type: GrantFiled: July 11, 2011Date of Patent: June 5, 2012Assignee: Toyota Jidosha Kabushiki KaishaInventors: Minoru Nakadori, Minoru Saeki
-
Publication number: 20110270466Abstract: A curve radius estimating device (100) configured to estimate a curve radius of a lane on which a self vehicle is driving includes a first curve radius calculating part (110) configured to calculate a first curve radius on a steering angle, a second curve radius calculating part (111) configured to calculate a second curve radius on a yaw rate, and a curve radius estimating part (112) configured to estimate a curve radius by combining the first curve radius and the second curve radius at a predetermined combination ratio. The curve radius estimating part (112) changes the predetermined combination ratio depending on a vehicle speed.Type: ApplicationFiled: July 11, 2011Publication date: November 3, 2011Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Minoru NAKADORI, Minoru Saeki
-
Publication number: 20110022852Abstract: A flowchart shows a general processing procedure of cryptographic computation executed by a cryptographic computation apparatus 100. A power supply is turned on in S101. In S102, a cryptographic computation execution program is fetched, and initialization such as memory allocation is performed. In S103, a plaintext is input, and the plaintext is stored by a RAM or the like. In S104, the cryptographic computation execution program is fetched, and the cryptographic computation is performed using a resistor or the RAM. In S105, a ciphertext is extracted. In S106, a CPU determines whether or not to continue a cryptographic computation process. In case of continuation, the flow returns to S102. In the above encryption process of S102 through S106, a resistor/memory input process (S200) is interposed between S103 and S104. In S200, before the cryptographic computation (S104) is started, data (e.g.Type: ApplicationFiled: March 25, 2008Publication date: January 27, 2011Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Tsuneo Sato, Minoru Saeki, Manabu Misawa
-
Publication number: 20100204870Abstract: A following distance control device includes a vehicle speed detecting device that detects the vehicle speed VSPD of an own vehicle and outputs a vehicle speed equal to or less than a predetermined speed as zero, a following distance detecting device that detects a following distance between a preceding vehicle and the own vehicle, a first requested acceleration computing device that computes a requested acceleration GBASE from the vehicle speed and the following distance, and a stop determining device that determines the stop of the own vehicle, on the basis of a requested acceleration Greg_pre_0 kph at a time point when the output value of the vehicle speed detecting device becomes zero.Type: ApplicationFiled: June 3, 2008Publication date: August 12, 2010Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Minoru Saeki
-
Publication number: 20100122108Abstract: There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.Type: ApplicationFiled: October 23, 2009Publication date: May 13, 2010Inventors: Daisuke Suzuki, Minoru Saeki, Yuichiro Nariyoshi
-
Patent number: 7668638Abstract: A disclosed inter-vehicle distance control apparatus for controlling an inter-vehicle distance between a present vehicle equipped with this apparatus and a preceding vehicle traveling ahead of the present vehicle changes a target deceleration of the present vehicle and/or a deceleration gradient of the present vehicle, with which the deceleration reaches the target deceleration of the present vehicle, between when the present vehicle is under a first deceleration condition in which the present vehicle decelerates under the circumstance where the inter-vehicle distance between the present vehicle and the preceding vehicle is relatively short and when the present vehicle is under a second deceleration condition in which the present vehicle decelerates under the circumstance where the inter-vehicle distance is relatively long.Type: GrantFiled: July 25, 2005Date of Patent: February 23, 2010Assignee: Toyota Jidosha Kabushiki KaishaInventor: Minoru Saeki
-
Patent number: 7460965Abstract: It is a purpose to evaluate a tamper resistance of an actual circuit with a high accuracy and at a high speed in an upstream process of a circuit design.Type: GrantFiled: July 7, 2004Date of Patent: December 2, 2008Assignee: Mitsubishi Electric CorporationInventors: Minoru Saeki, Daisuke Suzuki
-
Patent number: 7447577Abstract: A curve's radius of a road on which a vehicle shall run is estimated based on actual speed, yaw rate, and steering angle of the vehicle. Accordingly, during a transition state of the vehicle, the curve's radius can be estimated with the actual yaw rate taking into account the actual steering angle that can reflect more accurately turning behavior of the vehicle than the actual yaw rate. Therefore, errors in the estimation of the curve's radius due to response delay of the actual yaw rate can be easily reduced even though the yaw rate is used for such estimation.Type: GrantFiled: December 12, 2003Date of Patent: November 4, 2008Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akira Hattori, Minoru Saeki
-
Publication number: 20080021940Abstract: An electronic device that defends against an attack trying to identify confidential information from power consumption is provided without any circuit that performs a complementary operation to eliminate bias in power consumption. An elementary device A 100 is formed by a plurality of transistors 101-112. The elementary device A 100 receives inputs signals x1, x2, a random number r, and a control signal en, and outputs z. The output z is obtained by XORing (x1ˆr)&(x2ˆr) with the random number r. After the state transitions of the input signal, x1, x2, and the random number r, are settled, the control signal en is used to output z. This makes the signal transition rate of the output z equal, thereby defending against an attack trying to identify confidential information from power consumption.Type: ApplicationFiled: July 7, 2004Publication date: January 24, 2008Inventors: Daisuke Suzuki, Minoru Saeki
-
Publication number: 20070219735Abstract: It is a purpose to evaluate a tamper resistance of an actual circuit with a high accuracy and at a high speed in an upstream process of a circuit design.Type: ApplicationFiled: July 7, 2004Publication date: September 20, 2007Inventors: Minoru Saeki, Daisuke Suzuki
-
Publication number: 20060025918Abstract: A disclosed inter-vehicle distance control apparatus for controlling an inter-vehicle distance between a present vehicle equipped with this apparatus and a preceding vehicle traveling ahead of the present vehicle changes a target deceleration of the present vehicle and/or a deceleration gradient of the present vehicle, with which the deceleration reaches the target deceleration of the present vehicle, between when the present vehicle is under a first deceleration condition in which the present vehicle decelerates under the circumstance where the inter-vehicle distance between the present vehicle and the preceding vehicle is relatively short and when the present vehicle is under a second deceleration condition in which the present vehicle decelerates under the circumstance where the inter-vehicle distance is relatively long.Type: ApplicationFiled: July 25, 2005Publication date: February 2, 2006Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Minoru Saeki