Abstract: A residual magnetic flux estimation device 1 includes a DC power-source control device 11 which controls a DC power source 300 to apply a DC voltage across two terminals of a ? connection that is a secondary winding or a tertiary winding, a voltage measuring device 12 which measures a terminal voltage at the primary side of a three-phase transformer 200, a computing device 13 that determines a phase having a high voltage between the two phases other than the phase to which the voltage is applied, and a residual magnetic flux measuring device 14 that measures a phase-to-phase residual magnetic flux between the two phases other than the high-voltage phase, and estimates a measured value of the phase-to-phase residual magnetic flux as a maximum residual magnetic flux in the measurement-target three-phase transformer.

Abstract: According to one embodiment, there is provided a magnetizing inrush current suppression apparatus including an interrupting phase detection unit that detects a phase when the transformer that converts a three-phase alternating-current voltage to a single-phase alternating-current voltage is disconnected, a single-phase alternating-current voltage measurement unit that measures the single-phase alternating-current voltage on the power system side of the circuit breaker, and a closing unit that closes the circuit breaker in the detected phase, based on the measured single-phase alternating-current voltage.

Abstract: According to one embodiment, there is provided a breaker-phase-control switching system including a merging unit, a superordinate unit, and a circuit-breaker control unit. The circuit-breaker control unit includes a waveform-zero-point-calculation processing unit configured to calculate a current phase, based on absolute time kept by an internal clock and waveform data, and a predicted-breaker-operating-time-calculation processing unit configured to predict a predicted operating time. Further, a command-output-timing-determination processing unit is included which determines a timing for electrically conducting a coil from the absolute time, a preset target phase, a current phase, and a predicted operating time.

Abstract: A residual magnetic flux estimation device 1 includes a DC power-source control device 11 which controls a DC power source 300 to apply a DC voltage across two terminals of a ? connection that is a secondary winding or a tertiary winding, a voltage measuring device 12 which measures a terminal voltage at the primary side of a three-phase transformer 200, a computing device 13 that determines a phase having a high voltage between the two phases other than the phase to which the voltage is applied, and a residual magnetic flux measuring device 14 that measures a phase-to-phase residual magnetic flux between the two phases other than the high-voltage phase, and estimates a measured value of the phase-to-phase residual magnetic flux as a maximum residual magnetic flux in the measurement-target three-phase transformer.

Abstract: A printing machine generates use information including the number of printouts made in a printing operation, and transmits the generated use information to a management apparatus. A machine information data base stores old use information of the printing machine and a threshold value of a predetermined number of printouts in association with the printing machine. Upon reception of the use information sent from the printing machine, a machine management server stores the use information in the machine information data base and counts up the number of printouts of the printing machine. When the counted number of printouts exceeds the threshold value stored in the machine information data base, it is determined that preventive maintenance for the printing machine is needed. When it is determined that preventive maintenance is necessary, the machine management server sends instruction information instructing preventive maintenance to the maintenance terminal.

Abstract: A current transducer system for measuring AC current in a high-voltage main circuit having a circuit breaker and a disconnecting switch in an integrated gas-insulated switchgear. The system comprises a current sensor for detecting the AC current and outputting an analog electric signal representing the AC current, the current sensor disposed near the circuit breaker. The system further comprises a sensor unit including an analog-to-digital converter for converting the analog electric signal to a digital electric signal, and an electric-to-optic converter for converting the digital electric signal to a digital optic signal, the sensor unit disposed near the circuit breaker. The system further comprises optic transmission means for transmitting the digital optic signal.

Abstract: An information service system includes an office apparatus provided to a customer, a service providing apparatus that provides service to the customer, and an information service apparatus that generates and provides information on the office apparatus. The information service apparatus includes a usage condition information part that collects and manages usage condition information that shows the condition of usage of the office apparatus, a service information part that collects and manages service information that shows the service provided to the customer by the service providing apparatus, and an information providing part that generates and provides the information on the office apparatus based on at least one of the usage condition information and the service information.

Abstract: A current transducer system for measuring AC current in a high-voltage main circuit having a circuit breaker and a disconnecting switch in an integrated gas-insulated switchgear. The system comprises a current sensor for detecting the AC current and outputting an analog electric signal representing the AC current, the current sensor disposed near the circuit breaker. The system further comprises a sensor unit including an analog-to-digital converter for converting the analog electric signal to a digital electric signal, and an electric-to-optic converter for converting the digital electric signal to a digital optic signal, the sensor unit disposed near the circuit breaker. The system further comprises optic transmission means for transmitting the digital optic signal.

Abstract: Data in a data base that describe a logic circuit are converted to a simulation model, and simulations are performed based on them. When it is desired to change a part of the circuit while a simulation is in progress, a tentative correction is made by directly changing the simulation model without entering logics to the data base again. Simulation is continued based on the changed simulation model, then, after the action has been confirmed, the contents of the change are reflected on the data base. In this way, a circuit can easily be changed while simulation is in progress.

Abstract: There is provided a non-volatile semiconductor memory which is capable of establishing a proper reading voltage for an erasure threshold voltage and a proper writing time for the reading voltage by detecting the threshold voltages for writing and erasing in a memory cell array. The present non-volatile semiconductor memory, which is called a flash EEPROM, includes a first memory cell array 1, a second memory cell array 2, a row decoder 3, a line decoder 4, a reading control circuit 5, a writing and erasing control circuit 6, a writing time control circuit 7, a high voltage generating circuit 8, a counter circuit 13, a 1/N circuit 9, and a reading voltage generating circuit 11. The first memory cell array 1 and the second memory cell array 2 are formed on a same memory cell array, and all of the data stored in both memory cell arrays can be erased at once. Thus, all the memory cells in the memory cell array have the same erasure threshold voltage.

Abstract: A buffer circuit comprises a storage unit for storing input data, a control unit for controlling an output of input data to an external circuit either directly or via the storage unit by writing the input data into the storage unit and then reading the input data out therefrom, and a selection unit for selecting for an output either the input data for direct output or the input data written into and then read out from the memory unit. The control unit determines whether input data exist and whether the external circuit is ready for receiving output data, and controls, based on a result of the determination, the output of the selection unit to the external circuit.

Abstract: The present invention is a simulation apparatus which can shorten the transmission and reception time of events, and unify simulation models to make it possible to use the same language expression as that for an ordinary model to express a real chip. The simulation apparatus comprises a real chip simulation section for carrying out simulation for a portion having an unknown internal logic by using a real chip, a logic simulation hardware section for carrying out simulation for a portion whose internal logic is described, and a high speed dedicated network for transferring event data between the real chip simulation section and the logic simulation hardware section. The simulation apparatus can be applied to hardware accelerators used in logic timing simulation in the field of CAE.

Abstract: Disclosed is a refractory/heat insulating panel used in buildings and structures which must have a refractory performance. In the refractory/heat insulating panel (801), the mechanical strength and the fireproofing performance at the joint portions, which are weak portions in the panel, are increased by integrally forming inorganic boards (831) in the male and female joint portions (832, 836), filling a light-weight aggregate in the core material located at the male and female joint portions at a high density, or making the density of the core material at the joint portions higher than that at the center of the panel.

Abstract: In a logic simulation apparatus formed of dedicated hardware for simulating a logic operation of at least one logic circuit, and connected to at least one host computer, the apparatus includes: a plurality of clusters, each cluster including at least a communication network and a plurality of processor elements connected each other through the communication network; and an upper communication network for connecting among clusters. The host computer is connected to at least one cluster, and the connection configuration among the plurality of clusters is changeable in accordance with the size of the logic operation to be simulated under instructions of configuration change generated by the host computer. The apparatus further includes an error analysis system for the simulation process.

Abstract: A process for purifying crude acetonitrile comprising: (1) a step of contacting crude acetonitrile with nascent oxygen, (2) a step of contacting the acetonitrile from step (1) with a solid base, and (3) a step of removing low-boiling compounds and high-boiling compounds from the acetonitrile from step (2), wherein the step (3) may be effected after the step (1) and before the step (2).

Abstract: As a device used to paint a pattern such as a band, stripe or streak on the surface of an elongate and thin base material continuously supplied, a painting device is composed of at least a painting groove provided across the moving direction of the base material continuously supplied and having an opening formed along its both ends with a width wider than the width of the above-described base material in a manner not to be closed by the base material, a primary pipe communicated with the painted groove and a secondary pipe linked with the primary pipe, so that different kinds of paints are filled into the painting groove through the primary and secondary pipes to paint a pattern such as a band, stripe or streak over the whole surface of the base material in motion.

Abstract: A laser apparatus includes an electric power supply system and a cooling water supply system. Both the electric terminals of the electric power supply system for connection with an external power cable and ports of the cooling water supply system for communicating with external pipes are placed in the forward part of the laser apparatus for facilitating its maintenance. A storage tank stores cooling water to be supplied to a laser oscillator. Both an ion exchanger and a filter are commonly housed in the tank to downsize the apparatus, to minimize the water leakage and to effectively purify the cooling water. Interchangeable flow control valves are provided for different electric power frequencies. According to the available power frequency an appropriate one of the valves is chosen and connected to internal piping to achieve the desired flow rate of the cooling water supplied to the laser oscillator.

Abstract: An image forming apparatus into which additional information and the write area are inputted when reading a document image and which synthesizes the additional information as well as the document image read and prints the data on write area inputted, and especially that which prints the additional information in an area between punch holes for filing.

Abstract: A simulation apparatus and method for a logic circuit including a multi-port RAM effects simulation by provisionally representing input and output ports by use of a plurality of memory primitives and effecting the operation equivalent to the operation of the multi-port RAM. The address, data input and write enable terminals of input side memory primitives are supplied with write addresses, data inputs and write enable signals, respectively, and the chip select terminals thereof are supplied with "0" from a logic primitive. The write enable signals are also supplied to an AND logic primitive. The address terminals of output side memory primitives are supplied with respective read addresses, the data input terminals thereof are supplied with an output of the AND logic primitive, the chip select terminals thereof are supplied with "0" from a logic primitive, and the write enable terminals thereof are supplied with "1" from a logic primitive.

Abstract: Event packets are input to an event handler both in a scheduling phase and in a dispatching phase of an event scheduler. In the scheduling phase, EVCNT of a device of an occurring event is counted up by 1, and in the dispatching phase, EVCNT of a device of a mature event is counted down. In the dispatching phase multiple events are detected based on the EVCNT. If an old status of the top event of the multiple events is equal to a current status of the device, it is decided that event-outstripping has occurred, and events are cancelled. If the old status is not equal to the current status, it is decided that a glitch occurs, and events are modified according to a given mode value. Since the event handler can be implemented by a simple combination logic unit, acceleration performance of a logic simulation accelerator is not adversely affected.