Patents by Inventor Minoru Shiga

Minoru Shiga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7266608
    Abstract: This invention provides an apparatus for sending and receiving serial data without losing the real time characteristics even in case of a plurality of errors. According to this invention, an overhead of the communication can be reduced, and the time for the communication can be reduced. In a system for sending and receiving serial data between a primary station and a secondary station by sending a polling request and a refresh request through a serial transmission bus in determined time, the primary station retries a polling request and a refresh request to the secondary station which has not responded normally in the same determined time after sending the polling request and the refresh request.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: September 4, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga
  • Publication number: 20010056514
    Abstract: This invention provides an apparatus for sending and receiving serial data without losing the real time characteristics even in case of a plurality of errors. According to this invention, an overhead of the communication can be reduced, and the time for the communication can be reduced.
    Type: Application
    Filed: January 19, 2001
    Publication date: December 27, 2001
    Inventors: Hitoshi Ishida, Minoru Shiga
  • Patent number: 6070232
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: May 30, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Patent number: 5829030
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: October 27, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Patent number: 5749091
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: May 5, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Patent number: 5452443
    Abstract: A bus coupling type multi-processor system is disclosed having multiple processor modules and a fault detection system. A processor module includes a first processor, a second processor, and a monitor including a timer for measuring elapsed time, a register for storing a flag indicating the operation of its own processor, and a detector for detecting a fault either in its own processor or in another processor module. A starting circuit starts the second processor one clock period later than the first processor. A comparator compares the output from the first processor with the output of the second processor to detect a fault. A flag is set by its own processor module and is reset by a signal from another processor module. When a flag set by a first processor module is not reset by a second processor module, the monitor circuit in the first processor module detects this and judges that a fault has occurred in the second processor module.
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: September 19, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideo Oyamada, Minoru Shiga
  • Patent number: 5293500
    Abstract: A parallel processor is provided with a plurality of independently operable command units and a plurality of function units each connected to the command unit. A data unit, a register file, and a carry bit are shared such that the command and function units operate in parallel without any conflict. A priority scoreboard is provided to control the register file so that the command units operate independently according to the parallelism of a program, and detect and avoid a contention for a register according to the order of priority, making simultaneous execution of a plurality of commands possible, resulting in the increased process speed.
    Type: Grant
    Filed: May 27, 1993
    Date of Patent: March 8, 1994
    Assignee: Mitsubishi Denki K.K.
    Inventors: Hitoshi Ishida, Shigeyuki Kazama, Minoru Shiga
  • Patent number: 5226166
    Abstract: A parallel processor is provided with a plurality of independently operable command units and a plurality of function units each connected to the command unit. In order to operate the command and functions units in parallel without any conflict, a data unit, a register file, and a carry bit are shared. A priority score board is provided to control the register file so that the command units operate independently according to the parallelism of a program, and detect and avoid a competition for a register according to the order of priority, making simultaneous execution of a plurality of commands possible and, thus, the process speed higher.
    Type: Grant
    Filed: February 12, 1990
    Date of Patent: July 6, 1993
    Assignee: Mitsubishi Denki K.K.
    Inventors: Hitoshi Ishida, Shigeyuki Kazama, Minoru Shiga
  • Patent number: 5214027
    Abstract: Described is pyridine derivatives defined according to one of generic formula (I) ##STR1## wherein R.sup.2 represents isopropenyl group when R.sup.1 is methyl or ethyl group, R.sup.2 represents isopropenyl or acetyl group when R.sup.1 is isopropenyl group, R.sup.2 represents methyl group when R.sup.1 is isopropyl group and R.sup.2 represents isopropenyl, or isopropyl group when R.sup.1 is acetyl group; and perfumery composition containing the derivatives.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: May 25, 1993
    Assignees: Shiono Koryo Kaisha, Ltd., Lion Corporation
    Inventors: Masakazu Ishihara, Tomoyuki Tsuneya, Minoru Shiga, Hiroshi Sato, Fumio Yoshida, Keiichi Yamagishi
  • Patent number: 5071563
    Abstract: A method for removing sulfate ions from an aqueous solution of an alkali metal chloride is disclosed, in which the aqueous solution of the alkali metal chloride containing sulfate ions and zirconium hydrous oxide are brought into contact with each other in a slurry form under acidic conditions to thereby cause the sulfate ions to be adsorbed to the zirconium hydrous oxide by an ion exchange reaction, the zirconium hydrous oxide adsorbing sulfate ions is separated from the aqueous solution and then dispersed in another aqueous liquid to thereby cause it to react with an alkali so as to cause sulfate ions to be desorbed into the aqueous liquid. According to this method, adsorption and desorption take place rapidly and efficiently.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: December 10, 1991
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Minoru Shiga, Toshiji Kano, Takamichi Kishi
  • Patent number: 4643808
    Abstract: A method for controlling chlorates in an aqueous alkali metal hydroxide liquor produced by an ion exchange membrane electrolysis is provided, which comprises adding a reducing agent to brine to keep the concentration of chlorates to a specified value or less. The present invention provides an alkali metal hydroxide liquor with low content of chlorates.
    Type: Grant
    Filed: October 4, 1984
    Date of Patent: February 17, 1987
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Takamichi Kishi
  • Patent number: 4596639
    Abstract: Disclosed is an electrolysis process which is characterized by carrying out the electrolysis of an aqueous alkali metal halide solution while supplying a cathode liquor into a cathode compartment formed between a cation exchange membrane positioned substantially horizontal and a cathode plate of gas-liquid impermeability, with which the membrane is wetted, then a mixed stream of the cathode liquor and cathode gas being removed from the cathode compartment.Also disclosed is an electrolytic cell which is comprised of an upper anode compartment and a lower cathode compartment partitioned by a cation exchange membrane positioned substantially horizontal, said anode compartment having therein substantially horizontal anodes and an anolyte solution inlet and outlet, and said cathode compartment having a cathode plate with gas-liquid impermeability and a cathode liquor inlet and an outlet of a mixed stream of the cathode liquor and cathode gas.
    Type: Grant
    Filed: October 18, 1982
    Date of Patent: June 24, 1986
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Tsutomu Nishio, Yasushi Samejima, Minoru Shiga, Toshiji Kano, Koji Saiki
  • Patent number: 4586994
    Abstract: Disclosed is an electrolytic process using a horizontal type cation exchange membrane electrolytic cell in which catholyte liquor is supplied into a cathode compartment with initial linear velocity of at least 8 cm/sec and gas content of at most 0.6 at a catholyte liquor outlet. Also disclosed is an electrolytic cell used for the foregoing process. The invention enables not only conversion of a mercury electrolytic cell to a cation exchange membrane electrolytic cell with low cost, but the long-term and stable operation.
    Type: Grant
    Filed: December 6, 1983
    Date of Patent: May 6, 1986
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Kiyoshi Yamada, Tsutomu Nishio, deceased
  • Patent number: 4574037
    Abstract: Disclosed is a vertical type electrolytic cell partitioned by an ion exchange membrane into an anode compartment and a cathode compartment, the cathode compartment being divided by a non-perforated cathode plate into a cathode gas generation room and a cathode gas separation room. Also disclosed is an electrolytic process using the electrolytic cell wherein the catholyte is circulated between the two rooms as a result of a gas lift effect produced by the cathode gas.
    Type: Grant
    Filed: December 30, 1983
    Date of Patent: March 4, 1986
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Koji Saiki, Tsutomu Nishio, deceased
  • Patent number: 4568433
    Abstract: An electrolytic process using a horizontal electrolytic cell partitioned by a cation exchange membrane into an anode compartment and a cathode compartment is disclosed which is characterized by supplying into the cathode compartment catholyte liquor at a flow rate satisfying the equation;Y.gtoreq.9 log.sub.10 X+11wherein Y is initial linear velocity (cm/sec) of the catholyte liquor containing no cathode gas or containing cathode gas in an extremely small amount, and X is length (m) of a passageway of the catholyte liquor in the cathode compartment.
    Type: Grant
    Filed: September 12, 1984
    Date of Patent: February 4, 1986
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Kiyoshi Yamada
  • Patent number: 4556470
    Abstract: An electrolytic cell is disclosed comprising an upper anode compartment and a lower cathode compartment partitioned by a cation exchange membrane, in which partitioning spacers are provided on a cathode plate in order to eliminate the troubles owing to non-uniform flow of catholyte liquor, non-uniformity of anode-cathode gap, coarse surface of the cathode plate and the like.
    Type: Grant
    Filed: April 11, 1984
    Date of Patent: December 3, 1985
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Kiyoshi Yamada
  • Patent number: 4539083
    Abstract: Disclosed is a method for preventing a low hydrogen overvoltage cathode from degradation in activity characterized by adding a reducing agent to a cathode compartment of an electrolytic cell which electrolysis an aqueous alkali metal halide solution. According to the invention, no degradation takes place even after repeated shutdown of operation.
    Type: Grant
    Filed: July 26, 1984
    Date of Patent: September 3, 1985
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yasushi Samejima, Minoru Shiga, Toshiji Kano, Takamichi Kishi