Patents by Inventor Minoru Sugawara

Minoru Sugawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7170683
    Abstract: A reflector for extreme ultraviolet light, its manufacture method, a phase shift mask, an exposure apparatus and a semiconductor manufacture method, capable of making the wavelength dependency of a reflectance via a plurality of reflection surfaces be coincident with an center wavelength of exposure light and retaining a sufficient energy reaching a subject to be exposed. The reflector for exposure light to be used for exposure of a subject to be exposed in a lithography process of manufacturing a semiconductor device is configured to have a multi-layer film structure made by repetitively stacking a plurality of layers in the same order. The periodical length of the repetitive stack unit of the multi-layer film structure is set in such a manner that the center of full width at half maximum of the reflectance via a predetermined number of reflectors becomes coincident with the center wavelength of extreme ultraviolet light to be reflected (S102).
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: January 30, 2007
    Assignee: Sony Corporation
    Inventor: Minoru Sugawara
  • Publication number: 20060167161
    Abstract: Main object is to provide a composition for parts of the intake system, which is capable of enhancing the flexural elasticity modulus of the parts of the intake system and reducing the specific gravity of the parts. Disclosed is a fiber reinforced resin composition for parts of intake system on the internal combustion engine comprising a block polypropylene type resin which has a MFR in the range of 40-70 g/10 minutes (at 230° C. and under a load of 2.16 kg) and which is in the range of 60-80% by weight of the composition, and glass fibers and mica the total of which are in the range of 20-40% by weight of the composition.
    Type: Application
    Filed: June 29, 2004
    Publication date: July 27, 2006
    Inventors: Taketoshi Matsumoto, Jun Suzuki, Tohru Iwashita, Minoru Sugawara
  • Publication number: 20060099517
    Abstract: There is disclosed an extreme ultraviolet phase shift mask that may be constituted practically by obtaining an appropriate combination of a refractive index with an absorption coefficient, even in the case of a reflection of an extreme ultraviolet radiation. When constituting a phase shift mask (10) having a reflective mask blank with multilayered films (11) that reflects a short ultraviolet light and a first and a second regions (12a) and (12b) formed on the reflective mask blank with multilayered films (11), firstly, with reference to an arbitrary complex refractive index to the extreme ultraviolet radiation and an arbitrary thickness of a film, a phase and a reflectance of a reflected light contained in the extreme ultraviolet radiation based on the above complex refractive index and the above film thickness are specified.
    Type: Application
    Filed: July 1, 2003
    Publication date: May 11, 2006
    Applicant: SONY CORPORATION
    Inventor: Minoru Sugawara
  • Publication number: 20050252714
    Abstract: A sound absorbing body 40 has a molded body 44 including two unexpanded layers 41, 42 and an expanded layer 43 having a number of voids and held between these unexpanded layers 41, 42, a plurality of holes 41A of a depth that passes through the unexpanded layer 41 and does not reach the other unexpanded layer 42 are formed at any positions on the molded body 44, a cross-sectional area of the hole 41A is in the range from 0.785 to 314 mm2, and the pitch is 1 mm or larger. Laminating a plurality of materials is not required, and both the sound absorbing capability and sound insulating capability can be secured by integral molding, and further, only unpleasant sounds can selectively be absorbed.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 17, 2005
    Inventors: Hirofumi Goda, Minoru Sugawara, Yoshiaki Saito, Takeharu Suga, Masaharu Okamura, Toshifumi Sakai
  • Publication number: 20050186486
    Abstract: A method for correcting an exposure mask including a film of mask blank having reflex function for an EUV and an absorber film patterned on the film of mask blank for absorbing the EUV, the present method includes the steps of obtaining a light energy E0 when the EUV is vertically incident to the front surface of the mask, and when the EUV is incident to the front surface of the mask at an angle that can be considered that it is vertically incident thereto; obtaining a light energy E1 when the EUV is obliquely incident to the front surface of the mask and the EUV is reflected; and correcting the mask pattern in accordance with the compared result of the light energies E0 and E1.
    Type: Application
    Filed: February 21, 2005
    Publication date: August 25, 2005
    Inventor: Minoru Sugawara
  • Publication number: 20050151095
    Abstract: A reflector for extreme ultraviolet light, its manufacture method, a phase shift mask, an exposure apparatus and a semiconductor manufacture method, capable of making the wavelength dependency of a reflectance via a plurality of reflection surfaces be coincident with an center wavelength of exposure light of exposure light and retaining a sufficient energy reaching a subject to be exposed. The reflector for exposure light to be used for exposure of a subject to be exposed in a lithography process of manufacturing a semiconductor device is configured to have a multi-layer film structure made by repetitively stacking a plurality of layers in the same order. The periodical length of the repetitive stack unit of the multi-layer film structure is set in such a manner that the center of full width at half maximum of the reflectance via a predetermined number of reflectors becomes coincident with the center wavelength of extreme ultraviolet light to be reflected (S102).
    Type: Application
    Filed: April 18, 2003
    Publication date: July 14, 2005
    Applicant: Sony Corporation
    Inventor: Minoru Sugawara
  • Publication number: 20050089761
    Abstract: When producing an exposure mask including mask blanks (12) for reflecting extreme ultraviolet light, an absorber film (14) for covering a light reflection plane of the mask blanks with a predetermined pattern, and a buffer film (13) interposed therebetween, the swing effect and the bulk effect that occur on a transferred portion of the predetermined pattern are specified in accordance with characteristic values of forming materials of the absorber film (14) and the buffer film (13) and optical conditions when exposing, and a forming film thickness of the absorber film is decided in consideration of the specified swing effect and the specified bulk effect so that the line width variation of the pattern and/or pattern shift of the pattern are at their minimum values.
    Type: Application
    Filed: February 25, 2003
    Publication date: April 28, 2005
    Inventor: Minoru Sugawara
  • Patent number: 6841430
    Abstract: A semiconductor device with p-channel and n-channel field effect devices formed on a common substrate, where the drain and source regions of the n-channel field effect device are formed within a silicon epitaxial layer formed on a silicon layer germanium relax which is formed on a silicon germanium buffer layer with a graduated germanium concentration. Additionally, drain and source regions of the p-channel field effect device are formed within a silicon-germanium compound layer formed on the substrate and the silicon epitaxial cap layer formed on the silicon-germanium compound layer.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: January 11, 2005
    Assignee: Sony Corporation
    Inventors: Minoru Sugawara, Takashi Noguchi
  • Publication number: 20040188723
    Abstract: Disclosed is a semiconductor device capable of increasing the operational speed and reducing the power consumption. The semiconductor device includes an n-channel field effect transistor and a p-channel field effect transistor which are provided on a common base-substrate. A surface region, in which the n-channel field effect transistor is provided, of the base-substrate includes: a silicon substrate; a buffer layer formed on the silicon substrate, the buffer layer being made from a silicon-germanium compound having a germanium concentration gradually increased toward an upper surface of the buffer layer; a relax layer formed on the buffer layer, the relax layer being made from a silicon-germanium compound having a germanium concentration nearly equal to that of a surface portion of the buffer layer; and a silicon layer formed on the relax layer. Source/drain regions are formed in the silicon layer.
    Type: Application
    Filed: April 6, 2004
    Publication date: September 30, 2004
    Inventors: Minoru Sugawara, Takashi Noguchi
  • Publication number: 20040155345
    Abstract: A semiconductor integrated circuit device able to configure a desired circuit in accordance with a circuit configuration instruction signal given from the outside and able to operate the configured circuit is provided. The semiconductor integrated circuit device has a plurality of circuit elements, a plurality of connection elements each of which becomes a conductive state or a nonconductive state, interconnects for supplying control signals for placing the connection elements in the conductive state or the nonconductive state, and a plurality of circuit selection switching elements, wherein said circuit selection switching elements are driven in response to the circuit configuration instruction signal, control signals are output from the circuit selection switching elements, and the desired circuit is configured by combining the circuit elements via said connection elements which become the conductive state or the nonconductive state in accordance with the control signals.
    Type: Application
    Filed: April 8, 2004
    Publication date: August 12, 2004
    Inventors: Minoru Sugawara, Makoto Motoyoshi
  • Patent number: 6773656
    Abstract: Provided are scratch-resistant blow moldings of crystalline resin having good surface gloss of at least 80% and high surface hardness of at least HB. A crystalline resin melt parison is blown in a blow mold into a blow-molded article, where the temperature of the inner wall of the mold falls between 20° C. lower than the crystallization temperature of the crystalline resin and 5° C. lower than the melting point of the crystalline resin; then, a pressure fluid is introduced into the pinched parison; then the mold is heated to a temperature lower by 10° C. than the melting point of the crystalline resin and a temperature below the melting point of the crystalline resin.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: August 10, 2004
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Tadahiro Kannari, Minoru Sugawara
  • Patent number: 6750486
    Abstract: A semiconductor device with p-channel and n-channel field effect devices formed on a common substrate, where the drain and source regions of the n-channel field effect device are formed within a silicon epitaxial layer formed on a silicon layer germanium relax which is formed on a silicon germanium buffer layer with a graduated germanium concentration. Additionally, drain and source regions of the p-channel field effect device are formed within a silicon-germanium compound layer formed on the substrate and the silicon epitaxial cap layer formed on the silicon-germanium compound layer.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: June 15, 2004
    Assignee: Sony Corporation
    Inventors: Minoru Sugawara, Takashi Noguchi
  • Publication number: 20030143351
    Abstract: Provided are scratch-resistant blow moldings of crystalline resin having good surface gloss of at least 80% and high surface hardness of at least HB. A crystalline resin melt parison is blown in a blow mold into a blow-molded article, where the temperature of the inner wall of the mold falls between 20° C. lower than the crystallization temperature of the crystalline resin and 5° C. lower than the melting point of the crystalline resin; then, a pressure fluid is introduced into the pinched parison; then the mold is heated to a temperature lower by 10° C. than the melting point of the crystalline resin and a temperature below the melting point of the crystalline resin.
    Type: Application
    Filed: January 23, 2003
    Publication date: July 31, 2003
    Applicant: IDEMITSU PETROCHEMICAL CO., LTD.
    Inventors: Tadahiro Kannari, Minoru Sugawara
  • Patent number: 6303071
    Abstract: Provided is a method for producing blow moldings having a relatively large size through blow molding by use of a simple facility. The method including the steps of feeding a melt parison of crystalline resin into the space between molds, clamping the molds, blowing a pressurized fluid into the interior of the parison so as to cause the parison to be into close contact with the inner surfaces of the molds and to solidify the parison, wherein, while the parison and the mold inner surfaces are in close contact, the temperature of inner surfaces of the molds is maintained at a temperature from a temperature 10° C. lower than the crystallization temperature of the crystalline resin to the melting point of the resin, and the parison is removed from the molds after the parison is cooled through introduction thereinto or discharge therefrom, during or after blowing-in of the pressurized fluid, of a cooling medium not higher than room temperature.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: October 16, 2001
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Minoru Sugawara, Katsuhiko Tada, Tomoyuki Obara, Koki Hirano
  • Publication number: 20010003364
    Abstract: Disclosed is a semiconductor device capable of increasing the operational speed and reducing the power consumption. The semiconductor device includes an n-channel field effect transistor and a p-channel field effect transistor which are provided on a common base-substrate. A surface region, in which the n-channel field effect transistor is provided, of the base-substrate includes: a silicon substrate; a buffer layer formed on the silicon substrate, the buffer layer being made from a silicon-germanium compound having a germanium concentration gradually increased toward an upper surface of the buffer layer; a relax layer formed on the buffer layer, the relax layer being made from a silicon-germanium compound having a germanium concentration nearly equal to that of a surface portion of the buffer layer; and a silicon layer formed on the relax layer. Source/drain regions are formed in the silicon layer.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 14, 2001
    Applicant: Sony Corporation
    Inventors: Minoru Sugawara, Takashi Noguchi
  • Patent number: 5821015
    Abstract: A pattern-shape evaluation method for a photomask used in a photolithography process is provided in order to accurately evaluate pattern corrections performed against the optical proximity effect within mask-line-width latitude, exposure latitude, and the depth of focus.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: October 13, 1998
    Assignee: Sony Corporation
    Inventor: Minoru Sugawara
  • Patent number: 5788297
    Abstract: A resin-made shock absorbing member for a vehicle used as a bumper bean of the vehicle and the like and the method for producing the same. The resin-made shock absorbing member for the vehicle is structured to include an elongated curved portion (20) having a hollow portion, and an attachment portion (30) for fixing to a vehicle body (11) to be united and thus continuously formed with the curved portion (20) at both ends in the longitudinal direction of the curved portion (20). By structuring the attachment portions (30) to have a hollow portion and a solid portion, at least extending in the longitudinal direction of the curved portion (20), attachment work can be carried out from the outer side of the vehicle, and the shock absorbing function can be ensured along the whole length of the member (10).
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: August 4, 1998
    Assignees: Idemitsu Petrochemical Co., Ltd., Toyota Jidosha Kabushiki Kaisha
    Inventors: Minoru Sugawara, Tetsuya Nakamura, Katsuhiko Tada, Hiroshi Takai, Hiroshi Jounishi, Yoshihide Endou, Ken Fukuda
  • Patent number: 5786427
    Abstract: There are provided a highly rigid propylenic resin which has a melt index MI in the range of 0.1 to 1.2 g/10 minutes as determined at 230.degree. C. under 2.160 kg load and also satisfies a relationship between the MI and the elongational viscosity ?Y(Pa.s)!, said relationship being represented by the expression2.0.times.10.sup.5 .times.MI.sup.-0.68 .ltoreq.Y.ltoreq.8.0.times.10.sup.5.times. MI.sup.-0.68 ;and a blow molded article made from the above resin. The propylenic resin has favorable resistance to draw down and can produce a large-sized and lightweight blow molded article excellent in rigidity, dimensional stability and heat resistance.
    Type: Grant
    Filed: June 12, 1997
    Date of Patent: July 28, 1998
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Masato Kijima, Masayuki Shinohara, Minoru Sugawara, Koki Hirano
  • Patent number: 5736613
    Abstract: There are provided a highly rigid propylenic resin which has a melt index MI in the range of 0.1 to 1.2 g/10 minutes as determined at 230.degree. C. under 2.160 kg load and also satisfies a relationship between the MI and the elongational viscosity ?Y(Pa.multidot.s)!, said relationship being represented by the expression2.0.times.10.sup.5 .times.MI.sup.-0.68 .ltoreq.Y.ltoreq.8.0.times.10.sup.5 .times.MI.sup.-0.68 ;and a blow molded article made from the above resin. The propylenic resin has favorable resistance to draw down and can produce a large-sized and lightweight blow molded article excellent in rigidity, dimensional stability and heat resistance.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: April 7, 1998
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Masato Kijima, Masayuki Shinohara, Minoru Sugawara, Koki Hirano
  • Patent number: 5723235
    Abstract: A photomask, a method of producing the same, a method of exposing using the same and a method of manufacturing a semiconductor device using the same are disclosed, which permit correlation to be found out with respect to a large number of mask condition parameters, thus permitting optimum condition to be obtained such as to be less aloof from the actual process, permits quantitative grasping of performance, permits reduction of time and cost, and permits effects of mask pattern size fluctuations, etc. into considerations.Either defocus latitude, mask pattern size latitude II and exposure latitude I is combined with pluralities of data in predetermined ranges of the other two latitudes I and II to determine the permissible range of the first-noted latitude III for optimum value determination.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: March 3, 1998
    Assignee: Sony Corporation
    Inventors: Keisuke Tsudaka, Minoru Sugawara