Patents by Inventor Minoru Yabumoto

Minoru Yabumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8972924
    Abstract: A method for changing, by using a computer, an arrangement of strings that are arranged along an inner periphery of a graphic and partially overlap one another is offered. The computer arranges the strings in a radial pattern from a reference point determined within the graphic, determines whether overlapping strings are present, and moves the reference point in a direction to separate from the overlapping strings when the computer determines that the overlapping strings are present.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: March 3, 2015
    Assignee: Fujitsu Limited
    Inventors: Kenichi Nishimura, Minoru Yabumoto, Naoto Toda
  • Publication number: 20120095884
    Abstract: The part information providing system includes a part information database a retrieving section, and a notifying section. The part information database stores part information including a price of a first part and identification information of a cheaper second part, serving as a substitute for the first part, in association with identification of the first part. The retrieving section retrieves identification information of a third part, which is a component of a device, from the database and, if the identification information of the third part is associated with that of the second part, retrieves the second part, which serves as a substitute for the third part and is cheaper than the third part, from the part using the identification information of the second part by following a link of the identification information of the second part. The notifying section notifies a user of information about the second part retrieved.
    Type: Application
    Filed: September 8, 2011
    Publication date: April 19, 2012
    Applicant: Fujitsu Limited
    Inventors: Misako TANABE, Kiyokazu Moriizumi, Minoru Yabumoto
  • Patent number: 7444612
    Abstract: In designing integrated circuits such as FPGAs, a design support environment including the quality of design data is improved and the design efficiency is improved. An integrated-circuit design support apparatus that supports designing of an integrated circuit having a plurality of pins is provided. The apparatus includes a processor (a central processing unit) that forms a pin layout matrix (a matrix sheet) by unifying pin layout information of the integrated circuit using a common format and arranging the pin layout information in coordinates. The processor creates an integrated-circuit design library from the pin layout matrix.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: October 28, 2008
    Assignee: Fujitsu Limited
    Inventors: Masato Ariyama, Junko Taira, Kazuyuki Iida, Minoru Yabumoto, Tomohisa Suzuki, Minako Kubota
  • Publication number: 20060059447
    Abstract: In designing integrated circuits such as FPGAs, a design support environment including the quality of design data is improved and the design efficiency is improved. An integrated-circuit design support apparatus that supports designing of an integrated circuit having a plurality of pins is provided. The apparatus includes a processor (a central processing unit) that forms a pin layout matrix (a matrix sheet) by unifying pin layout information of the integrated circuit using a common format and arranging the pin layout information in coordinates.
    Type: Application
    Filed: December 21, 2004
    Publication date: March 16, 2006
    Inventors: Masato Ariyama, Junko Taira, Kazuyuki Iida, Minoru Yabumoto, Tomohisa Suzuki, Minako Kubota