Patents by Inventor Min-Su Ahn

Min-Su Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10403572
    Abstract: A semiconductor device includes a substrate having a cell region and a circuit region, an upper wiring layer on the substrate, and a redistribution wiring layer on the upper wiring layer. The upper wiring layer includes a secondary uppermost wiring in the circuit region and an uppermost wiring on the secondary uppermost wiring. The uppermost wiring includes an uppermost chip pad electrically connected to the secondary uppermost wiring. At least a portion of the uppermost chip pad in the cell region. The redistribution wiring layer includes a redistribution wiring electrically connected to the uppermost chip pad. At least a portion of the redistribution wiring serving as a landing pad connected to an external connector.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: September 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Chul Cho, Min-Su Ahn, Jung-Hwan Choi
  • Publication number: 20180122741
    Abstract: A semiconductor device includes a substrate having a cell region and a circuit region, an upper wiring layer on the substrate, and a redistribution wiring layer on the upper wiring layer. The upper wiring layer includes a secondary uppermost wiring in the circuit region and an uppermost wiring on the secondary uppermost wiring. The uppermost wiring includes an uppermost chip pad electrically connected to the secondary uppermost wiring. At least a portion of the uppermost chip pad in the cell region. The redistribution wiring layer includes a redistribution wiring electrically connected to the uppermost chip pad. At least a portion of the redistribution wiring serving as a landing pad connected to an external connector.
    Type: Application
    Filed: August 17, 2017
    Publication date: May 3, 2018
    Inventors: Young-Chul CHO, Min-Su AHN, Jung-Hwan CHOI
  • Patent number: 9830960
    Abstract: A memory device may include a data output circuit configured to multiplex a plurality of data signals read from a memory cell array, wherein the data output circuit includes a clock boosting circuit configured to receive a plurality of internal clock signals generated based on a first power voltage, and to generate a plurality of boosted clock signals by boosting the plurality of internal clock signals based on a second power voltage having a voltage level greater than that of the first power voltage, and a data output driver configured to multiplex and output the plurality of data signals synchronized with the boosted clock signals.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: November 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-kyo Lee, Won-young Lee, Bo-bae Shin, Jung-hwan Choi, Yong-cheol Bae, Seok-hun Hyun, Min-su Ahn
  • Patent number: 9742355
    Abstract: A buffer circuit includes a first differential amplifier, second differential amplifier, third differential amplifier, and mixer. The first differential amplifier generates a positive differential signal and a negative differential signal based on an input signal and a reference voltage signal. The second differential amplifier generates a first signal based on the positive differential signal and the negative differential signal. The third differential amplifier generates a second signal having a different phase from the first signal based on the positive differential signal and the negative differential signal. The mixer outputs a signal, generated by mixing the first signal and the second signal, as an output signal.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 22, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Joo Eom, Seung-Jun Bae, Dae-Sik Moon, Joon-Young Park, Min-Su Ahn
  • Publication number: 20170140799
    Abstract: A memory device may include a data output circuit configured to multiplex a plurality of data signals read from a memory cell array, wherein the data output circuit includes a clock boosting circuit configured to receive a plurality of internal clock signals generated based on a first power voltage, and to generate a plurality of boosted clock signals by boosting the plurality of internal clock signals based on a second power voltage having a voltage level greater than that of the first power voltage, and a data output driver configured to multiplex and output the plurality of data signals synchronized with the boosted clock signals.
    Type: Application
    Filed: October 17, 2016
    Publication date: May 18, 2017
    Inventors: Chang-kyo LEE, Won-young LEE, Bo-bae SHIN, Jung-hwan CHOI, Yong-cheol BAE, Seok-hun HYUN, Min-su AHN
  • Patent number: 9474509
    Abstract: An apparatus for generating a 3D ultrasonic color image of a fetus based on skin color of a mother includes a sample image acquisition unit acquiring a sample image by photographing a skin of a pregnant woman, a 2D color map generator generating a 2D color map based on the sample image, a probe irradiating ultrasonic signals into the pregnant woman and receiving reflected ultrasonic echo signals, a volume data generator generating 3D volume data based on the ultrasonic echo signals, and a controller generating a 3D ultrasonic color image of the fetus by applying values of the 2D color map to a 3D ultrasonic image obtained by volume rendering of the 3D volume data.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: October 25, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Ihn Kho, Hee-Sae Lee, Min-Su Ahn
  • Patent number: 9406164
    Abstract: Provided is an apparatus and method of multi-view rendering. A method of multi-view rendering includes rendering one or more 3D objects based on a first viewpoint, transforming pixel values of pixels of the first viewpoint, which are obtained by the rendering of the 3D objects, into pixel values of pixels based on a second viewpoint that is different from the first viewpoint, detecting an occlusion region that is a remaining region other than a region represented by the pixel values obtained by the transforming of the pixel values in an image based on the second viewpoint, and rendering the detected occlusion region based on the second viewpoint.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: August 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-ihn Kho, Do-kyoon Kim, Tae-hyun Rhee, Min-su Ahn, Hee-sae Lee
  • Publication number: 20160164479
    Abstract: A buffer circuit includes a first differential amplifier, second differential amplifier, third differential amplifier, and mixer. The first differential amplifier generates a positive differential signal and a negative differential signal based on an input signal and a reference voltage signal. The second differential amplifier generates a first signal based on the positive differential signal and the negative differential signal. The third differential amplifier generates a second signal having a different phase from the first signal based on the positive differential signal and the negative differential signal. The mixer outputs a signal, generated by mixing the first signal and the second signal, as an output signal.
    Type: Application
    Filed: December 4, 2015
    Publication date: June 9, 2016
    Inventors: YOON-JOO EOM, SEUNG-JUN BAE, DAE-SIK MOON, JOON-YOUNG PARK, MIN-SU AHN
  • Publication number: 20140277032
    Abstract: A method and related apparatus are provided for making an ultrasonic irradiation plan include generating a 3D organ model from an input image, generating irradiation information about a unit treatment volume based on at least one of a movement and a deformation of an organ in the 3D organ model, simulating irradiation of ultrasound for virtual treatment by using the generated irradiation information, and making an ultrasonic irradiation plan based on the simulation. Additionally, a method is provided for determining if such an ultrasonic irradiation plan is applicable, and if so carrying it out by emitting appropriate ultrasonic radiation.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-su AHN, Won-chul BANG
  • Publication number: 20140073925
    Abstract: An apparatus for generating a 3D ultrasonic color image of a fetus based on skin color of a mother includes a sample image acquisition unit acquiring a sample image by photographing a skin of a pregnant woman, a 2D color map generator generating a 2D color map based on the sample image, a probe irradiating ultrasonic signals into the pregnant woman and receiving reflected ultrasonic echo signals, a volume data generator generating 3D volume data based on the ultrasonic echo signals, and a controller generating a 3D ultrasonic color image of the fetus by applying values of the 2D color map to a 3D ultrasonic image obtained by volume rendering of the 3D volume data.
    Type: Application
    Filed: July 12, 2013
    Publication date: March 13, 2014
    Inventors: Young-Ihn KHO, Hee-Sae LEE, Min-Su AHN
  • Publication number: 20140018709
    Abstract: Methods and apparatuses for generating treatment plans to be provided to focused ultrasound therapy apparatuses are provided. The method includes receiving an area to which ultrasound is to be irradiated, determining a size of a focal spot in the area, determining locations of focal spots in the area to which ultrasounds are to be sequentially irradiated based on the size of the focal spot, such that each of the locations of the focal spots is farthest from locations of focal spots in the area to which ultrasounds have been previously-irradiated, determining durations and intensities of ultrasound irradiations based on the size of the focal spot and the locations of the focal spots, and generating the treatment plan to irradiate ultrasound based on the size of the focal spot, the locations of the focal spots, and the durations and the intensities of the ultrasound irradiations.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 16, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-su AHN, Won-chul BANG
  • Publication number: 20130144194
    Abstract: A method of making an ultrasonic irradiation plan includes receiving image data representing anatomical features of a target object, generating information about at least one portion of the target object that is to be irradiated with ultrasound from the image data representing the anatomical features of the target object, and making an ultrasonic irradiation plan for irradiating the target object with ultrasound by simulating irradiating the target object with ultrasound based on the generated information.
    Type: Application
    Filed: November 16, 2012
    Publication date: June 6, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min-su Ahn, Won-chul Bang
  • Publication number: 20130106478
    Abstract: A clock buffer circuit that generates a clock signal having a random cycle and duty from an input clock signal and a data output circuit including the same. The clock buffer circuit includes a buffer unit configured to receive an input clock signal and generate an internal clock signal and a first clock signal; a delay controller configured to receive the internal clock signal from the buffer unit and generate a delayed control signal according to a first control signal and a second control signal; and a delay unit configured to generate a second clock signal according to the first clock signal received from the buffer unit and the second clock signal received from the delay controller. The delay unit is configured to generate the second clock signal by randomly delaying transmission of the first clock signal.
    Type: Application
    Filed: August 30, 2012
    Publication date: May 2, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byong-mo MOON, Min-su AHN
  • Publication number: 20130027394
    Abstract: Provided is an apparatus and method of multi-view rendering. A method of multi-view rendering includes rendering one or more 3D objects based on a first viewpoint, transforming pixel values of pixels of the first viewpoint, which are obtained by the rendering of the 3D objects, into pixel values of pixels based on a second viewpoint that is different from the first viewpoint, detecting an occlusion region that is a remaining region other than a region represented by the pixel values obtained by the transforming of the pixel values in an image based on the second viewpoint, and rendering the detected occlusion region based on the second viewpoint.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 31, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-ihn KHO, Do-kyoon KIM, Tae-hyun RHEE, Min-su AHN, Hee-sae LEE
  • Publication number: 20130018285
    Abstract: A method of controlling a focus in a focused ultrasound therapy apparatus, the method including receiving an target area to which ultrasound is radiated to remove a lesion; determining a path through which the focus moves in the target area, depending on a form of the target area; and forming the focus on the determined path and then radiating ultrasound to the target area.
    Type: Application
    Filed: May 24, 2012
    Publication date: January 17, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-ho PARK, Hyoung-ki LEE, Ho-taik LEE, Min-su AHN, Ji-young PARK
  • Patent number: 7910437
    Abstract: A method for fabricating a semiconductor device may include: forming an outer trench, including: a first trench, and a second trench formed under the first trench, the second trench being formed by etching a substrate, forming a dielectric layer, which fills the second trench, by performing a thermal oxidation process, such that a width of the second trench is less than a width of the first trench, forming a gate dielectric layer along a surface of a semiconductor structure including the dielectric layer, and forming a gate electrode, which fills a remaining portion of the outer trench, over the gate dielectric layer.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: March 22, 2011
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Seong-Hak Baek, Min-Su Ahn
  • Publication number: 20100026353
    Abstract: The semiconductor device may include a calibration circuit, a control unit, and a delay unit. The calibration circuit may be configured to output an output signal. The control unit may be configured to generate and output the control signal in response to the output signal of the calibration circuit. The control unit may generate the control signal by using a correlation between a signal transmission speed of the semiconductor device and the output signal of the calibration circuit. The delay unit may be configured to delay a clock signal in response to the control signal and output the delayed clock signal to the output driver.
    Type: Application
    Filed: April 30, 2009
    Publication date: February 4, 2010
    Inventors: Yong-gwon Jeong, Kwang-il Park, Min-su Ahn