Abstract: The present invention relates to an epoxy resin composition for molding a semiconductor having excellent heat resistance and mechanical properties and also having improved visibility while having a low coefficient of thermal expansion and thus exhibiting improved warpage characteristics, and a molding film and a semiconductor package using such an epoxy resin composition for molding a semiconductor.

Abstract: The present invention relates to an epoxy resin composition for molding a semiconductor having excellent heat resistance and mechanical properties and also having improved visibility while having a low coefficient of thermal expansion and thus exhibiting improved warpage characteristics, and a molding film and a semiconductor package using such an epoxy resin composition for molding a semiconductor.

Abstract: The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.

Abstract: The present invention relates to a method for manufacturing an insulating layer for a semiconductor package which can improve reliability and have excellent heat resistance by removing pores generated in the insulating layer during manufacture of an insulating layer for a semiconductor package using magnetic characteristics, and an insulating layer for a semiconductor package obtained using the method for manufacturing the insulating layer for a semiconductor package.

Abstract: The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.

Abstract: The present disclosure relates to a resin composition for semiconductor adhesion comprising: a thermoplastic resin; a thermosetting resin; a curing agent; and a curing catalyst compound having a specific structure, and an adhesive film for semiconductor, a method for manufacturing a semiconductor package, and a semiconductor package using the same.

Abstract: The present disclosure relates to an adhesive composition for semiconductor circuit connection and an adhesive film containing the same. The adhesive composition for semiconductor circuit connection according to the present disclosure can exhibit excellent adhesive strength during thermal compression bonding of a semiconductor circuit, and minimize a warpage of wafer caused by stacking of semiconductor circuits.

Abstract: The present invention relates to a method for manufacturing an insulating layer for a semiconductor package which can improve reliability and have excellent heat resistance by removing pores generated in the insulating layer during manufacture of an insulating layer for a semiconductor package using magnetic characteristics, and an insulating layer for a semiconductor package obtained using the method for manufacturing the insulating layer for a semiconductor package.

Abstract: Provided is a mixing system to mix different types of fluids more efficiently. The mixing system installed in a piping in which a first fluid is supplied includes a mixing part including a plurality of mixing members each having a front end and a rear end rotated by a predetermined angle to form a curved surface and disposed to be spaced apart from each other and a supply part supplying a second fluid to a space between adjacent mixing members.

Abstract: The present invention relates to an epoxy resin composition for molding a semiconductor having excellent heat resistance and mechanical properties and also having improved visibility while having a low coefficient of thermal expansion and thus exhibiting improved warpage characteristics, and a molding film and a semiconductor package using such an epoxy resin composition for molding a semiconductor.

Abstract: Disclosed is a composite electrolyte membrane for a fuel cell. The composite electrolyte membrane includes a polybenzimidazole-based polymer and a metal-grafted porous structure. The composite electrolyte membrane is doped with phosphoric acid. The metal-containing porous structure is present in an amount of 0.1 to 30% by weight, based on the weight of the polymer. The presence of the metal-containing porous structure allows the fuel cell electrolyte membrane to have excellent thermal properties and high proton conductivity.

Abstract: Disclosed is a composite electrolyte membrane for a fuel cell. The composite electrolyte membrane includes a polybenzimidazole-based polymer and a metal-grafted porous structure. The composite electrolyte membrane is doped with phosphoric acid. The metal-containing porous structure is present in an amount of 0.1 to 30% by weight, based on the weight of the polymer. The presence of the metal-containing porous structure allows the fuel cell electrolyte membrane to have excellent thermal properties and high proton conductivity.

Abstract: A signal processing apparatus according to the present invention includes: a built-in self test device dividing a digital reference clock signal to output an I division signal and a Q division signal, shifting the I division signal and the Q division signal by predetermined angles, converting the shifted I and Q signal into analog signals to output an I testing signal and a Q testing signal; and a signal processing receiving and processing the I testing signal and the Q testing signal.

Abstract: A tuning circuit of a filter is disclosed to correct a cut-off frequency of the filter. The tuning circuit comprises a current generation unit which includes a first transistor and a resistor, and a capacitor compensation unit which includes a second transistor and a capacitor unit.

Abstract: Provided is a frequency control loop circuit changing division ratios of a frequency synthesizer to oscillate frequencies in a broadband with high precision. The circuit comprises a clock oscillator, a frequency synthesizer, and a demodulator.

Abstract: The present invention relates to a filter and, more particularly, to a tuning circuit of a filter for correcting a cut-off frequency of the filter. The tuning circuit comprises a current generation unit having a first transistor and a variable resistor unit, and a capacitance correction unit having a second transistor, a capacitor unit, an up-down counter and a selection unit for selecting a control path of the up-down counter for varying the resistance or capacitance.

Abstract: The present invention relates to an amplifier and, more particularly, to an adaptive linear amplifier with low power consumption and a high linearity. The adaptive linear amplifier according to the present invention comprises amplification means and a bias controller. The amplification means comprises a main transistor and an auxiliary transistor unit. The main transistor and the auxiliary transistor unit are coupled to each other. The bias controller controls a bias voltage applied to the main transistor and the auxiliary transistor unit.

Abstract: Disclosed herein is a circuit for generating reference current. The circuit for generating reference current comprises a current providing unit for generate a PTAT current, mirroring the PTAT current to generate an analogous PTAT current and generate an analogous BGR current, a current ratio control unit for generating an analogous BGR current in a first ratio, a PTAT current in a second ratio, and a current corresponding to the difference between the analogous PTAT current in the second ratio and the analogous BGR current in the first ratio, and a current increasing/decreasing unit for generating a BGR current in the first ratio.

Abstract: The present invention relates to a receiver chip formed on a monolithic semiconductor integrated circuit substrate. The receiver chip comprises a first receiver chip for receiving terrestrial digital multimedia broadcasting signals, a second receiver chip for receiving satellite digital multimedia broadcasting signals, and the monolithic semiconductor integrated circuit substrate. The first and second receiver chips are stacked and bonded on the monolithic semiconductor integrated circuit substrate.

Abstract: Provided is a frequency control loop circuit changing division ratios of a frequency synthesizer to oscillate frequencies in a broadband with high precision. The circuit comprises a clock oscillator, a frequency synthesizer, and a demodulator.