Patents by Inventor Min-Suk Kim

Min-Suk Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9257502
    Abstract: In one general aspect, a power semiconductor device can include a semiconductor substrate of a first conductivity type, and a semiconductor layer of a second conductivity type disposed on the semiconductor substrate. The semiconductor layer can include a high voltage unit, a low voltage unit disposed around the high voltage unit, and a level shift unit disposed between the high voltage unit and the low voltage unit. The power semiconductor device can include a first isolation region of the first conductivity type disposed between the high voltage unit and the level shift unit, and a second isolation region of the first conductivity type disposed between the low voltage unit and the level shift unit where the first isolation region and the second isolation region each are vertically aligned in the semiconductor layer and each extends to at least the semiconductor substrate.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: February 9, 2016
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Min-suk Kim, Sun-hak Lee, Jin-woo Moon, Hye-mi Kim
  • Publication number: 20130341718
    Abstract: In one general aspect, a power semiconductor device can include a semiconductor substrate of a first conductivity type, and a semiconductor layer of a second conductivity type disposed on the semiconductor substrate. The semiconductor layer can include a high voltage unit, a low voltage unit disposed around the high voltage unit, and a level shift unit disposed between the high voltage unit and the low voltage unit. The power semiconductor device can include a first isolation region of the first conductivity type disposed between the high voltage unit and the level shift unit, and a second isolation region of the first conductivity type disposed between the low voltage unit and the level shift unit where the first isolation region and the second isolation region each are vertically aligned in the semiconductor layer and each extends to at least the semiconductor substrate.
    Type: Application
    Filed: June 26, 2013
    Publication date: December 26, 2013
    Inventors: Min-suk KIM, Sun-hak LEE, Jin-woo MOON, Hye-mi KIM
  • Patent number: 8557674
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: October 15, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol Choi, Chang-ki Jeon, Min-suk Kim
  • Patent number: 8399923
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: March 19, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol Choi, Chang-ki Jeon, Min-suk Kim
  • Patent number: 8198858
    Abstract: A mobile terminal is provided including a battery, an output unit, a memory, and a controller. The battery provides power. The output unit outputs a wireless recharge state. The memory stores recharge menus and recharge menu settings. The controller provides recharge menus for wireless recharging of the battery based on whether payment is required for the wireless recharging. The controller also performs a wireless recharging operation according to selection of the recharge menu settings.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: June 12, 2012
    Assignee: LG Electronics Inc.
    Inventors: Min-Suk Kim, Won-Lee Park
  • Patent number: 8114805
    Abstract: The present invention relates to a method of preparing a heteropoly acid catalyst used for the production of methacrylic acid by gas phase oxidation of methacrolein, more precisely a method of preparing a heteropoly acid catalyst comprising the steps of preparing a slurry by adding metal precursors and ammonium salt to protonic acid Keggin-type heteropoly acid aqueous solution and stirring thereof; and drying, molding and firing the slurry to give a catalyst. The present invention provides a method of preparing a heteropoly acid catalyst exhibiting high methacrolein conversion rate and methacrylic acid selectivity without pre-firing process by using high purity protonic acid Keggin-type heteropoly acid and ammonium salt.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: February 14, 2012
    Assignee: LG Chem, Ltd.
    Inventors: Hyun-Kuk Noh, Hyun-jong Shin, Won-ho Lee, Byung-yul Choi, Gyo-hyun Hwang, Ju-yeon Park, Duk-ki Kim, Young-hyun Choe, Min-ho Kil, Min-suk Kim, Young-jin Cho, Sung-chul Lim
  • Patent number: 8053386
    Abstract: The present invention relates to a heteropoly acid catalyst which is used for the production of methacrylic acid by gas phase oxidation of methacrolein and a preparing method thereof. The present invention, thereby, provides a novel heteropoly acid catalyst having excellent methacrolein conversion rate, methacrylic acid selectivity and yield.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: November 8, 2011
    Assignee: LG Chem, Ltd.
    Inventors: Gyo-hyun Hwang, Min-ho Kil, Hyun-kuk Noh, Won-ho Lee, Min-suk Kim
  • Patent number: 7972874
    Abstract: Semiconductor process evaluation methods perform multiple scans of a test semiconductor substrate (e.g., test wafer) using ion beams under different ion implanting conditions. Parameters of the test semiconductor substrate that was scanned using the ion beams under different ion implanting conditions are then measured to conduct the semiconductor process evaluation.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-bae Jang, Seung-chul Kim, Chan-seung Choi, Min-suk Kim, Chee-wan Kim, Sun-yong Lee, Sang-rok Hah
  • Publication number: 20100279442
    Abstract: Semiconductor process evaluation methods perform multiple scans of a test semiconductor substrate (e.g., test wafer) using ion beams under different ion implanting conditions. Parameters of the test semiconductor substrate that was scanned using the ion beams under different ion implanting conditions are then measured to conduct the semiconductor process evaluation.
    Type: Application
    Filed: July 12, 2010
    Publication date: November 4, 2010
    Inventors: Won-bae Jang, Seung-chul Kim, Chan-seung Choi, Min-suk Kim, Chee-wan Kim, Sun-yong Lee, Sang-rok Hah
  • Patent number: 7781234
    Abstract: Semiconductor process evaluation methods perform multiple scans of a test semiconductor substrate (e.g., test wafer) using ion beams under different ion implanting conditions. Parameters of the test semiconductor substrate that was scanned using the ion beams under different ion implanting conditions are then measured to conduct the semiconductor process evaluation.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: August 24, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-bae Jang, Seung-chul Kim, Chan-seung Choi, Min-suk Kim, Chee-wan Kim, Sun-yong Lee, Sang-rok Hah
  • Patent number: 7777524
    Abstract: Provided are a high-voltage semiconductor device including a junction termination which electrically isolates a low voltage unit from a high voltage unit, and a method of fabricating the same. The high voltage semiconductor device includes a high voltage unit, a low voltage unit surrounding the high voltage unit, and a junction termination formed between the high voltage unit and the low voltage unit and surrounding the high voltage unit to electrically isolate the high voltage unit from the low voltage unit. The junction termination includes at least one level shifter which level shifts signals from the low voltage unit and supplies the same to the high voltage unit, a first device isolation region surrounding the high voltage unit to electrically isolate the high voltage unit from the level shifter, and a resistor layer electrically connecting neighboring level shifters.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: August 17, 2010
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Chang-ki Jeon, Min-suk Kim, Yong-cheol Choi
  • Publication number: 20100184591
    Abstract: The present invention relates to a method of preparing a heteropoly acid catalyst used for the production of methacrylic acid by gas phase oxidation of methacrolein, more precisely a method of preparing a heteropoly acid catalyst comprising the steps of preparing a slurry by adding metal precursors and ammonium salt to protonic acid Keggin-type heteropoly acid aqueous solution and stirring thereof; and drying, molding and firing the slurry to give a catalyst. The present invention provides a method of preparing a heteropoly acid catalyst exhibiting high methacrolein conversion rate and methacrylic acid selectivity without pre-firing process by using high purity protonic acid Keggin-type heteropoly acid and ammonium salt.
    Type: Application
    Filed: June 13, 2008
    Publication date: July 22, 2010
    Applicant: LG CHEM, LTD.
    Inventors: Hyun-Kuk Noh, Hyun-jong Shin, Won-ho Lee, Byung-yul Choi, Gyo-hyun Hwang, Ju-yeon Park, Duk-ki Kim, Young-hyun Choe, Min-ho Kil, Min-suk Kim, Young-jin Cho, Sung-chul Lim
  • Publication number: 20100069230
    Abstract: The present invention relates to a heteropoly acid catalyst which is used for the production of methacrylic acid by gas phase oxidation of methacrolein and a preparing method thereof. The present invention, thereby, provides a novel heteropoly acid catalyst having excellent methacrolein conversion rate, methacrylic acid selectivity and yield.
    Type: Application
    Filed: November 29, 2007
    Publication date: March 18, 2010
    Applicant: LG CHEM, LTD.
    Inventors: Gyo-hyun Hwang, Min-Ho Kim, Hyun-kuk Noh, Won-ho Lee, Min-suk Kim
  • Publication number: 20100001343
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 7, 2010
    Applicant: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol CHOI, Chang-ki JEON, Min-suk KIM
  • Publication number: 20090253337
    Abstract: This disclosure relates to an apparatus and a method for making or baking a fluorescent lamp. An apparatus for baking a fluorescent lamp includes a heater to heat a plurality of quartz tubes. Each tube has a fluorescent lamp provided therein. A plurality of rollers rotates the quartz tubes placed thereon, and a transfer block has a plurality of auxiliary rollers. The transfer block is configured to move in a first direction to transfer the plurality of quartz tubes from the plurality of rotating rollers to the plurality of auxiliary rollers. A process for heating at least one fluorescent lamp includes a step of providing a plurality of quartz tubes on a plurality of rotating rollers, at least one quartz tube having a fluorescent lamp provided therein, heating the plurality of quartz tubes while being rotated on the plurality of rollers, and transferring the plurality of quartz tube using a transfer block having a plurality of auxiliary rollers.
    Type: Application
    Filed: October 31, 2008
    Publication date: October 8, 2009
    Inventors: Min-Suk KIM, Kang-Heum Lee, Tai-Hee Kim, Eun-Suk Kim, Min-Soo Kim
  • Publication number: 20090243696
    Abstract: Provided are a high-voltage semiconductor device including a junction termination which electrically isolates a low voltage unit from a high voltage unit, and a method of fabricating the same. The high voltage semiconductor device includes a high voltage unit, a low voltage unit surrounding the high voltage unit, and a junction termination formed between the high voltage unit and the low voltage unit and surrounding the high voltage unit to electrically isolate the high voltage unit from the low voltage unit. The junction termination includes at least one level shifter which level shifts signals from the low voltage unit and supplies the same to the high voltage unit, a first device isolation region surrounding the high voltage unit to electrically isolate the high voltage unit from the level shifter, and a resistor layer electrically connecting neighboring level shifters.
    Type: Application
    Filed: March 12, 2009
    Publication date: October 1, 2009
    Applicant: Fairchild Korea Semiconductor, Ltd.
    Inventors: Chang-ki Jeon, Min-suk Kim, Yong-cheol Choi
  • Publication number: 20090156268
    Abstract: A mobile terminal is provided including a battery, an output unit, a memory, and a controller. The battery provides power. The output unit outputs a wireless recharge state. The memory stores recharge menus and recharge menu settings. The controller provides recharge menus for wireless recharging of the battery based on whether payment is required for the wireless recharging. The controller also performs a wireless recharging operation according to selection of the recharge menu settings.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Inventors: Min-Suk Kim, Won-Lee Park
  • Patent number: D567817
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: April 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-Na Kwag, Min-Suk Kim
  • Patent number: D569384
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Sik Yoon, Nho-Kyung Hong, Hee-Woong Choi, In-Won Jong, Hee-Kyeong Jon, Sung-Jun Lee, Min-Suk Kim, You-Jin Im, Andrea Kim
  • Patent number: D576176
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: September 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Won Jong, Nho-Kyung Hong, Hee-Woong Choi, Kyoung-Sik Yoon, Min-Suk Kim, Hee-Kyeong Jon, Sung-Jun Lee, Andrea Kim, You-Jin Im