Abstract: According to one aspect, a method for determining, for a memory allocation, placements in a memory area of data blocks generated by a neural network, comprises a development of an initial sequence of placements of blocks, each placement being selected from several possible placements, the initial sequence being defined as a candidate sequence, a development of at least one modified sequence of placements from a replacement of a given placement of the initial sequence by a memorized unselected placement, and, if the planned size of the memory area obtained by this modified sequence is less than that of the memory area of the candidate sequence, then this modified sequence becomes the candidate sequence, the placements of the blocks for the allocation being those of the placement sequence defined as a candidate sequence once each modified sequence has been developed.

Abstract: Methods, microprocessors, and systems are provided for implementing an artificial neural network. Data buffers in virtual memory are coupled to respective processing layers in the artificial neural network. An ordered visiting sequence of layers of the artificial neural network is obtained. A virtual memory allocation schedule is produced as a function of the ordered visiting sequence of layers of the artificial neural network, the schedule including a set of instructions for memory allocation and deallocation operations applicable to the data buffers. A physical memory configuration dataset is computed as a function of the virtual memory allocation schedule for the artificial neural network, the dataset including sizes and addresses of physical memory locations for the artificial neural network.

Abstract: According to an aspect, a method is proposed for defining placements, in a volatile memory, of temporary scratch buffers used during an execution of an artificial neural network, the method comprising: determining an execution order of layers of the neural network, defining placements, in a heap memory zone of the volatile memory, of intermediate result buffers generated by each layer, according to the execution order of the layers, determining at least one free area of the heap memory zone over the execution of the layers, defining placements of temporary scratch buffers in the at least one free area of the heap memory zone according to the execution order of the layers.

Abstract: In an embodiment a method for managing a convolutional calculation carried out by a calculation unit adapted to calculate output data on output channels from convolution kernels applied to input data blocks on at least one input channel, wherein calculations on each input data block correspond respectively to an output datum on an output channel, and wherein the calculations with each convolution kernel correspond to the output data on each output channel respectively includes identifying a size of a memory location available in a temporary working memory of the calculation unit, pre-loading in the temporary working memory a maximum number of convolution kernels storable at the size of the memory; and controlling the calculation unit to calculate a set of output data calculable from pre-loaded convolution kernels.

Abstract: According to one aspect, a method for determining, for a memory allocation, placements in a memory area of data blocks generated by a neural network, comprises a development of an initial sequence of placements of blocks, each placement being selected from several possible placements, the initial sequence being defined as a candidate sequence, a development of at least one modified sequence of placements from a replacement of a given placement of the initial sequence by a memorized unselected placement, and, if the planned size of the memory area obtained by this modified sequence is less than that of the memory area of the candidate sequence, then this modified sequence becomes the candidate sequence, the placements of the blocks for the allocation being those of the placement sequence defined as a candidate sequence once each modified sequence has been developed.

Abstract: Methods, microprocessors, and systems are provided for implementing an artificial neural network. Data buffers in virtual memory are coupled to respective processing layers in the artificial neural network. An ordered visiting sequence of layers of the artificial neural network is obtained. A virtual memory allocation schedule is produced as a function of the ordered visiting sequence of layers of the artificial neural network, the schedule including a set of instructions for memory allocation and deallocation operations applicable to the data buffers. A physical memory configuration dataset is computed as a function of the virtual memory allocation schedule for the artificial neural network, the dataset including sizes and addresses of physical memory locations for the artificial neural network.

Abstract: Image-processing apparatus and methods to adaptively vary an interest point threshold value and control a number of interest points identified in an image frame are described. Sub-regions of an image frame may be processed in a sequence, and an interest point threshold value calculated for each sub-region. The calculated value of the interest point threshold may depend upon pre-selected values and values determined from the processing of one or more prior sub-regions. By using adaptive thresholding, a number of interest points detected for each frame in a sequence of image frames may remain substantially constant, even though objects within the frames may vary appreciably.

Abstract: Image-processing apparatus and methods to adaptively control a size and/or location of a visual search window used for feature matching in a machine-vision system are described. A search window controller may receive motion vector data and image recognition rate data, and compute a search window size and/or search window location based on the received data. The computed search window size may be a portion of an image frame. The motion vector data and image recognition rate data may be computed from one or more images in a video image sequence. By adaptively controlling search window size and location, an appreciable reduction in data processing burden for feature matching may be achieved.

Abstract: Image-processing apparatus and methods to adaptively vary an interest point threshold value and control a number of interest points identified in an image frame are described. Sub-regions of an image frame may be processed in a sequence, and an interest point threshold value calculated for each sub-region. The calculated value of the interest point threshold may depend upon pre-selected values and values determined from the processing of one or more prior sub-regions. By using adaptive thresholding, a number of interest points detected for each frame in a sequence of image frames may remain substantially constant, even though objects within the frames may vary appreciably.

Abstract: Image-processing apparatus and methods to adaptively control a size and/or location of a visual search window used for feature matching in a machine-vision system are described. A search window controller may receive motion vector data and image recognition rate data, and compute a search window size and/or search window location based on the received data. The computed search window size may be a portion of an image frame. The motion vector data and image recognition rate data may be computed from one or more images in a video image sequence. By adaptively controlling search window size and location, an appreciable reduction in data processing burden for feature matching may be achieved.

Abstract: A graphic system having a central processing unit; a system memory coupled to the central processing unit; a display unit provided with a corresponding screen; a graphic module coupled to and controlled by the central processing unit to render an image on the screen of the display unit, the graphic module including a fragment graphic module having a depth test buffer for storing a current depth value; a depth test stage coupled to the depth test buffer for comparing the current depth value with a depth coordinate associated with an incoming fragment and defining a resulting fragment; a test stage for testing the resulting fragment and defining a retained fragment; a buffer writing stage operatively associated with the test stage for receiving the retained fragment, the buffer writing stage coupled to the depth test buffer for updating the current depth value with a depth value of the retained fragment.

Abstract: A method for rendering a three dimensional scene on a displaying screen comprises: generating for a tile of a current scene a hierarchical z-buffer which comprises a plurality of levels organized according to depth values; calculating a minimum depth value d of a submitted primitive; calculating an intersection area associated with said primitive with respect to said tile; providing a multiplicity of aligned regions each associated with a level of the hierarchical z-buffer so that the exact area calculated is suitable to be covered, at least entirely, by the union of such aligned regions; comparing the minimum depth value d of the submitted primitive with corresponding maximum depth values v1, v2, . . . , vN each read from the levels of the hierarchical z-buffer; discarding said primitive whether the minimum depth value d is bigger than all maximum depth values v1, v2, . . . , vN.

Abstract: The disclosure relates to a graphics module for rendering a bidimensional scene on a display screen comprising a graphics pipeline of the sort-middle type, said graphics pipeline comprising: a first processing module configured to clip a span-type input primitive received from a rasterizer module into sub-span type primitives to be associated to respective macro-blocks corresponding to portions of the screen, and to store said sub-span type primitives in a scene buffer; a second processing module configured to reconstruct the span-type input primitive starting from said sub-span type primitives, the second processing module being further intended to implement a culling operation of sub-span type primitives of the occluded type.

Abstract: A graphic module wherein, given a curve P(x,y)=P(x(t), y(t)) between two points P0(x,y)=P0(x(t0), y(t0)) and P1(x,y)=P1(x(t1), y(t1), in the screen coordinates, a calculating circuit computes a curve mid-point Phalf(x,y)=Phalf(x(thalf), y(thalf)), where thalf=(t0+t1)/2 on the curve, computes a segment mid-point PM(x,y)=(P0(x,y)+P1(x,y))/2 on segment P0P1, computes a distance function d between the curve mid-point and the segment mid-point, and, given two thresholds THR0 and THR1, with THR0<=THR1, if d<THR0, it generates line segment P0P1, and if THR0<=d<THR1, it generates two line segments P0Phalf and PhalfP1 if d>=THR1, it repeats the previous steps for the curve portions from P0 to Phalf and from Phalf to P1.

Abstract: A graphic system having a central processing unit; a system memory coupled to the central processing unit; a display unit provided with a corresponding screen; a graphic module coupled to and controlled by the central processing unit to render an image on the screen of the display unit, the graphic module including a fragment graphic module having a depth test buffer for storing a current depth value; a depth test stage coupled to the depth test buffer for comparing the current depth value with a depth coordinate associated with an incoming fragment and defining a resulting fragment; a test stage for testing the resulting fragment and defining a retained fragment; a buffer writing stage operatively associated with the test stage for receiving the retained fragment, the buffer writing stage coupled to the depth test buffer for updating the current depth value with a depth value of the retained fragment.

Abstract: A graphic system having a central processing unit; a system memory coupled to the central processing unit; a display unit provided with a corresponding screen; a graphic module coupled to and controlled by the central processing unit to render an image on the screen of the display unit, the graphic module including a fragment graphic module having a depth test buffer for storing a current depth value; a depth test stage coupled to the depth test buffer for comparing the current depth value with a depth coordinate associated with an incoming fragment and defining a resulting fragment; a test stage for testing the resulting fragment and defining a retained fragment; a buffer writing stage operatively associated with the test stage for receiving the retained fragment, the buffer writing stage coupled to the depth test buffer for updating the current depth value with a depth value of the retained fragment.

Abstract: A graphic rendering method includes: providing data primitive representing primitives of a scene; defining a plurality of three-dimensional cells of a scene view frustum; ordering the cells according to an order based on cell depths from a reference plane; associating each primitive to a cell; and processing data primitives according to the cell order to renderize the scene.

Abstract: A graphic module wherein, given a curve P(x,y)=P(x(t), y(t)) between two points P0(x,y)=P0(x(t0), y(t0)) and P1(x,y)=P1(x(t1), y(t1)), in the screen coordinates, a calculating circuit computes a curve mid-point Phalf(x,y)=Phalf(x(thalf), y(thalf)), where thalf=((t0+t1)/2 on the curve, computes a segment mid-point PM(x,y)=(P0(x,y)+P1(x,y))/2 on segment P0P1, computes a distance function d between the curve mid-point and the segment mid-point, and, given two thresholds THR0 and THR1, with THR0<=THR1, if d<THR0, it generates line segment PoP1, and if THR0<=d<THR1, it generates two line segments P0Phalf and PhalfP1, and if d>=THR1, it repeats the previous steps for the curve portions from P0 to Phalf and from Phalf to P1.

Abstract: A graphics module for the rendering of a bidimensional scene on a displaying screen is described, comprising a sort-middle-type graphics pipeline, said graphics pipeline comprising: a first rasterizer module so configured as to convert an edge-type input primitive received by a path processing module into a primitive of active-edge-type; a first processing module so configured as to associate said primitive of active-edge-type to respective macro-blocks corresponding to portions of the screen and to store said primitive of active-edge-type into a scene buffer; a second processing module so configured as to read said scene buffer and to provide said primitive of active-edge-type to a second rasterizer module.

Abstract: The disclosure relates to a graphics module for rendering a bidimensional scene on a display screen comprising a graphics pipeline of the sort-middle type, said graphics pipeline comprising: a first processing module configured to clip a span-type input primitive received from a rasterizer module into sub-span type primitives to be associated to respective macro-blocks corresponding to portions of the screen, and to store said sub-span type primitives in a scene buffer; a second processing module configured to reconstruct the span-type input primitive starting from said sub-span type primitives, the second processing module being further intended to implement a culling operation of sub-span type primitives of the occluded type.