Patents by Inventor Misako Hirosue

Misako Hirosue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10134784
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: November 20, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Publication number: 20170154902
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 1, 2017
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 9570329
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: February 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Publication number: 20160314999
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Application
    Filed: July 7, 2016
    Publication date: October 27, 2016
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 9472429
    Abstract: An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: October 18, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Patent number: 9397126
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: July 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Publication number: 20160013221
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 14, 2016
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 9087931
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: July 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Patent number: 9054141
    Abstract: An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Publication number: 20150140713
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 21, 2015
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Publication number: 20150017751
    Abstract: An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
    Type: Application
    Filed: July 24, 2014
    Publication date: January 15, 2015
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 8889438
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Patent number: 8772783
    Abstract: The invention provides a technique to manufacture a display device with high image quality and reliability at low cost with high yield. According to the invention, a spacer is provided over a pixel electrode layer in a pixel region. Moreover, a surface of an insulating layer which functions as a partition which covers the periphery of the pixel electrode layer is formed at a high position from the surface of the pixel electrode due to stacked layers under the insulating layer. These spacer and insulator which function as a spacer support a mask used for selectively forming a light emitting material over a pixel electrode layer, thereby preventing the mask from contacting the pixel electrode layer due to a twist and deflection of the mask. Accordingly, such a damage as a crack does not occur in the pixel electrode layer which results in having no defect in shape. Therefore, a display device which performs a high resolution display with high reliability can be manufactured.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Misako Hirosue, Masahiro Katayama, Shunpei Yamazaki
  • Patent number: 8592861
    Abstract: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer, a gate electrode layer, and a wiring layer in contact with the impurity region of one conductivity type, which are provided over the semiconductor layer; a conductive layer which is formed over the gate insulating layer and in contact with the wiring layer; a first electrode layer in contact with the conductive layer; an electroluminescent layer provided over the first electrode layer; and a second electrode layer, where the wiring layer is electrically connected to the first electrode layer with the conductive layer interposed therebetween.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: November 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Hisashi Ohtani, Misako Hirosue
  • Publication number: 20120261671
    Abstract: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer, a gate electrode layer, and a wiring layer in contact with the impurity region of one conductivity type, which are provided over the semiconductor layer; a conductive layer which is formed over the gate insulating layer and in contact with the wiring layer; a first electrode layer in contact with the conductive layer; an electroluminescent layer provided over the first electrode layer; and a second electrode layer, where the wiring layer is electrically connected to the first electrode layer with the conductive layer interposed therebetween.
    Type: Application
    Filed: June 29, 2012
    Publication date: October 18, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kengo AKIMOTO, Hisashi Ohtani, Misako Hirosue
  • Publication number: 20120168066
    Abstract: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
    Type: Application
    Filed: February 28, 2012
    Publication date: July 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 8212284
    Abstract: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer, a gate electrode layer, and a wiring layer in contact with the impurity region of one conductivity type, which are provided over the semiconductor layer; a conductive layer which is formed over the gate insulating layer and in contact with the wiring layer; a first electrode layer in contact with the conductive layer; an electroluminescent layer provided over the first electrode layer; and a second electrode layer, where the wiring layer is electrically connected to the first electrode layer with the conductive layer interposed therebetween.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: July 3, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Hisashi Ohtani, Misako Hirosue
  • Patent number: 8137417
    Abstract: An object is to eliminate electric discharge due to static electricity generated by peeling when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element. A substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers. The film is bent along a curved surface of the pressurization roller on a side of the pressurization rollers, where the film is collected, and accordingly, peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka
  • Publication number: 20120045861
    Abstract: An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
    Type: Application
    Filed: October 31, 2011
    Publication date: February 23, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo EGUCHI, Yohei MONMA, Atsuhiro TANI, Misako HIROSUE, Kenichi HASHIMOTO, Yasuharu HOSAKA
  • Patent number: 8048777
    Abstract: An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka