Abstract: An electrically erasable and programmable read only memory device stores pieces of organizing information in a block organizer after completion of a process of fabricating thereof for producing organizing signals, and a row address decoder and driver unit assumes memory cell blocks to be reorganized into virtual memory cell blocks in response to the organizing signals so that user can freely reorganize the memory cell blocks.

Abstract: An electrically programmable read only memory device is equipped with a plurality of write-in circuits for concurrently writing a plurality of data bits into memory cells, wherein a write-in controlling unit sequentially produces a plurality of write-in controlling signals supplied to a transfer gate groups for sequentially transferring the data bits to column selectors associate with memory cell blocks so that the peak current in the write-in operation is not increased together with the number of the data bits concurrently written into the memory cells.

Abstract: A non-volatile semiconductor device having an improved write voltage application circuit, of the type having a plurality of non-volatile memory elements each coupled to a row line and a column line, and a write voltage application circuit provided for each row line for operatively applying a regulated amount of a write current to the row line in a write state. The write voltage application circuit includes a P-channel MIS transistor which is adapted to take a conductive state of a large resistance at least in a write state, for regulating the amount of the write current.