Patents by Inventor Misao Umematsu

Misao Umematsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10362704
    Abstract: An information processing apparatus includes a substrate that includes a first connector and a second connector, a backplane that includes a third connector coupled to the first connector and a fourth connector coupled to the second connector, and a metal plate attached to the backplane, wherein the metal plate has an opening to which the fourth connector is attached, wherein the first connector is arranged near a central part of the substrate on an end side inserted into the backplane and the second connector is arranged on each side of the first connector, and wherein a clearance between the opening of the metal plate and the fourth connector increases as a distance from the third connector to the fourth connector increases.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 23, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yukihiro Hirano, Masanori Tachibana, Akira Shimasaki, Yoshimi Maekawa, Misao Umematsu, Naomi Fukunaga
  • Publication number: 20190045652
    Abstract: An information processing apparatus includes a substrate that includes a first connector and a second connector, a backplane that includes a third connector coupled to the first connector and a fourth connector coupled to the second connector, and a metal plate attached to the backplane, wherein the metal plate has an opening to which the fourth connector is attached, wherein the first connector is arranged near a central part of the substrate on an end side inserted into the backplane and the second connector is arranged on each side of the first connector, and wherein a clearance between the opening of the metal plate and the fourth connector increases as a distance from the third connector to the fourth connector increases.
    Type: Application
    Filed: July 20, 2018
    Publication date: February 7, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yukihiro Hirano, Masanori Tachibana, Akira Shimasaki, Yoshimi Maekawa, Misao Umematsu, Naomi Fukunaga
  • Patent number: 10154609
    Abstract: A cable unit includes a first casing body, a second connector body, a first connector, a second casing, and a cable. The first casing body forms an open shape that includes a first main wall and a first peripheral side-wall. The second casing body forms an open shape that includes a second main wall and a second peripheral side-wall. The second casing body is fitted together with the first casing body such that the second casing body and the first casing body configure a box-shaped casing that expands and contracts along a direction in which the first main wall and the second main wall face each other. The first connector is provided to the first main wall. The second connector is provided to the second main wall. The cable is housed in the casing and connects the first connector with the second connector.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: December 11, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Misao Umematsu, Masanori Tachibana
  • Publication number: 20180124944
    Abstract: A cable unit includes a first casing body, a second connector body, a first connector, a second casing, and a cable. The first casing body forms an open shape that includes a first main wall and a first peripheral side-wall. The second casing body forms an open shape that includes a second main wall and a second peripheral side-wall. The second casing body is fitted together with the first casing body such that the second casing body and the first casing body configure a box-shaped casing that expands and contracts along a direction in which the first main wall and the second main wall face each other. The first connector is provided to the first main wall. The second connector is provided to the second main wall. The cable is housed in the casing and connects the first connector with the second connector.
    Type: Application
    Filed: September 29, 2017
    Publication date: May 3, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Misao Umematsu, Masanori Tachibana
  • Patent number: 9733433
    Abstract: An optical connection box includes, a plurality of first optical connectors to which a plurality of first optical paths are respectively connected, a plurality of second optical connectors that respectively include an operation unit protruding from a peripheral edge side position further from a position of the plurality of first optical connectors on a first surface of the optical connection box, and that are respectively connected to a plurality of receptacle optical connectors which are disposed in the plurality of second optical paths, a plurality of relay optical fibers in which any one of the plurality of first optical connectors is disposed in the first terminal and any one of the plurality of second optical connectors is disposed in the second terminal, and a fitting structure with respect to a substrate in which the receptacle optical connectors are disposed.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: August 15, 2017
    Assignees: FUJIKURA LTD., FUJITSU LIMITED
    Inventors: Seiji Kato, Akihiro Yasuo, Misao Umematsu
  • Publication number: 20150109731
    Abstract: An electronic device includes: an air-cooled substrate on which an air-cooled component that is cooled by an airflow is mounted; a liquid-cooled substrate that is set apart from the air-cooled substrate in plan view, the liquid-cooled substrate being mounted thereon a liquid-cooled component that is cooled by a liquid; and a refrigerant supply member that is disposed above the liquid-cooled substrate, the refrigerant supply member supplying a refrigerant that cools the liquid-cooled component.
    Type: Application
    Filed: October 15, 2014
    Publication date: April 23, 2015
    Inventors: Misao Umematsu, Yoshimi Kadotani, Keita Hirai
  • Publication number: 20150078719
    Abstract: An optical connection box includes, a plurality of first optical connectors to which a plurality of first optical paths are respectively connected, a plurality of second optical connectors that respectively include an operation unit protruding from a peripheral edge side position further from a position of the plurality of first optical connectors on a first surface of the optical connection box, and that are respectively connected to a plurality of receptacle optical connectors which are disposed in the plurality of second optical paths, a plurality of relay optical fibers in which any one of the plurality of first optical connectors is disposed in the first terminal and any one of the plurality of second optical connectors is disposed in the second terminal, and a fitting structure with respect to a substrate in which the receptacle optical connectors are disposed.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 19, 2015
    Applicants: FUJITSU LIMITED, FUJIKURA LTD.
    Inventors: Seiji KATO, Akihiro YASUO, Misao UMEMATSU
  • Publication number: 20150059388
    Abstract: An apparatus includes a cooling device that cools, by using refrigerant, heating components mounted over a circuit board and has different use-temperature conditions, wherein the circuit board is provided with a first area in which a first group of heating components having an operating condition of generating heat less than a given-heat quantity and operating in a temperature range lower than a first temperature is arranged, a second area in which a second group of heating components having an operating condition of generating heat equal not less than the given-heat quantity and operating in a temperature range between the first temperature and a second temperature exceeding the first temperature is arranged, and a third area in which a third group of heating components having an operating condition of generating heat equal to or less than the given-heat quantity and operating in a temperature range exceeding the second temperature is arranged.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Yukihiro Hirano, Keita Hirai, Akira Shimasaki, Keitaro KUROSAKI, Misao Umematsu
  • Publication number: 20150036272
    Abstract: An electronic device includes: substrate unit including a signal terminal provided over a first edge of a substrate body, and a power terminal provided over a second edge that is different from the first edge; and a case including an insertion unit into which the substrate unit is inserted from the first edge, a signal connection member to which the signal terminal is coupled when the substrate unit is inserted into the insertion unit, and a power connection member to which the power terminal is coupled when the substrate unit is inserted into the insertion unit.
    Type: Application
    Filed: July 7, 2014
    Publication date: February 5, 2015
    Inventors: Masanori Tachibana, Yukihiro Hirano, Misao Umematsu
  • Publication number: 20150009620
    Abstract: An electronic apparatus includes: an electronic device including a housing that accommodates a heat producing part, a heat transfer member configured to be exposed to an outer surface of the housing, and a heat pipe accommodated in the housing and configured to connect the heat producing part and the heat transfer member; and a cooling member, in contact with the heat transfer member, that is disposed on an outside of the housing, the cooling member in which a coolant circulating to and from an external coolant supply part.
    Type: Application
    Filed: June 23, 2014
    Publication date: January 8, 2015
    Inventors: Yoshimi Kadotani, Misao Umematsu, Tsuyoshi So, Keita Hirai
  • Patent number: 8780554
    Abstract: An IO system board included in an electronic device includes, in addition to a first section board that includes first ventilating holes and second section board that includes second ventilating holes, a third section board that includes third ventilating holes. Accordingly, a larger amount of cooling air is taken in via an air intake surface of a rack of the electronic device, flows into a casing of the IO system board, and then flows over a first sub circuit board, thus cooling a first heat-generating component.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: July 15, 2014
    Assignee: Fujitsu Limited
    Inventor: Misao Umematsu
  • Publication number: 20140071631
    Abstract: A printed circuit board unit includes a printed wiring board, an electronic component package mounted on a front surface of the printed wiring board, a radiating plate that is placed on an upper surface of the electronic component package, a bolt that has a head and a tip protruding from a back surface of the printed wiring board, and penetrates through the radiating plate and the printed wiring board, a reinforcing plate separated from the back surface of the printed wiring board by a predetermined gap, a stud arranged on a front surface of the reinforcing plate and coupled with the tip of the bolt, and a shock absorbing plate that is arranged between the reinforcing plate and the back surface of the printed wiring board.
    Type: Application
    Filed: November 15, 2013
    Publication date: March 13, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tsuyoshi SO, Hideo Kubo, Misao Umematsu
  • Publication number: 20120195001
    Abstract: An IO system board included in an electronic device includes, in addition to a first section board that includes first ventilating holes and second section board that includes second ventilating holes, a third section board that includes third ventilating holes. Accordingly, a larger amount of cooling air is taken in via an air intake surface of a rack of the electronic device, flows into a casing of the IO system board, and then flows over a first sub circuit board, thus cooling a first heat-generating component.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 2, 2012
    Applicant: Fujitsu Limited
    Inventor: Misao UMEMATSU
  • Publication number: 20100226102
    Abstract: A printed circuit board unit includes a printed wiring board, an electronic component package mounted on a front surface of the printed wiring board, a radiating plate that is placed on an upper surface of the electronic component package, a bolt that has a head and a tip protruding from a back surface of the printed wiring board, and penetrates through the radiating plate and the printed wiring board, a reinforcing plate separated from the back surface of the printed wiring board by a predetermined gap, a stud arranged on a front surface of the reinforcing plate and coupled with the tip of the bolt, and a shock absorbing plate that is arranged between the reinforcing plate and the back surface of the printed wiring board.
    Type: Application
    Filed: February 17, 2010
    Publication date: September 9, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Tsuyoshi SO, Hideo Kubo, Misao Umematsu
  • Patent number: 7291901
    Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: November 6, 2007
    Assignee: Fujitsu Limited
    Inventors: Masateru Koide, Misao Umematsu, Takashi Kanda, Yasuhiro Usui, Kenji Fukuzono
  • Patent number: 7268002
    Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: September 11, 2007
    Assignee: Fujitsu Limited
    Inventors: Masateru Koide, Misao Umematsu, Takashi Kanda, Yasuhiro Usui, Kenji Fukuzono
  • Publication number: 20060063303
    Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
    Type: Application
    Filed: November 3, 2005
    Publication date: March 23, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Masateru Koide, Misao Umematsu, Takashi Kanda, Yasuhiro Usui, Kenji Fukuzono
  • Patent number: 6891247
    Abstract: A semiconductor device includes a semiconductor bare chip and an electrically-insulative board member with a thin-film structure capacitor. The semiconductor bare chip has a power supply terminal and a grounding terminal on the back surface thereof. The semiconductor bare chip is mounted on a circuit board by flip-chip bonding. The board member includes a board and a thin-film structure capacitor provided on the board. The capacitor has terminals corresponding to the power supply terminal and the grounding terminal of the semiconductor bare chip thereon. The side of the board member where the capacitor is provided is bonded to the back surface of the semiconductor bare chip. The terminals of the capacitor are electrically connected to the power supply terminal and the grounding terminal of the semiconductor bare chip.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: May 10, 2005
    Assignee: Fujitsu Limited
    Inventors: Shunichi Kikuchi, Misao Umematsu
  • Publication number: 20040183193
    Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 23, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Masateru Koide, Misao Umematsu, Takashi Kanda, Yasuhiro Usui, Kenji Fukuzono
  • Publication number: 20020171153
    Abstract: A semiconductor device includes a semiconductor bare chip and a board member with a thin-film structure capacitor. The semiconductor bare chip has a power supply terminal and a grounding terminal on the back surface thereof. The semiconductor bare chip is mounted on a circuit board by flip-chip bonding. The board member includes a board and a thin-film structure capacitor provided on the board. The capacitor has terminals corresponding to the power supply terminal and the grounding terminal of the semiconductor bare chip thereon. The side of the board member where the capacitor is provided is bonded to the back surface of the semiconductor bare chip. The terminals of the capacitor are electrically connected to the power supply terminal and the grounding terminal of the semiconductor bare chip.
    Type: Application
    Filed: June 24, 2002
    Publication date: November 21, 2002
    Applicant: Fujitsu Limited
    Inventors: Shunichi Kikuchi, Misao Umematsu