Patents by Inventor Misato BOYAMA

Misato BOYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10096646
    Abstract: To provide a light-emitting unit having a semiconductor light-emitting device with a good responsiveness and a sufficient light emission quantity. The light-emitting unit comprises a plurality of semiconductor light-emitting devices, an n-wiring electrode and a p-wiring electrode respectively connecting the semiconductor light-emitting devices in parallel, an n-pad electrode connected to the n-wiring electrode, and a p-pad electrode connected to the p-wiring electrode. At least one of the Group III nitride semiconductor light-emitting devices has a light emission volume of 1 ?m3 to 14 ?m3.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: October 9, 2018
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Misato Boyama, Shingo Totani, Takashi Kawai, Yoshiki Saito, Naoyuki Okita
  • Patent number: 10069039
    Abstract: The present invention provides a light-emitting device suppressing the reduction in the light output while improving the response speed. As shown in FIG. 1, the light-emitting device comprises four square element regions arranged with the sides of the element regions aligned in a two by two lattice. The light-emitting regions are disposed in the vicinity of corners at the center side of the element regions, and the light-emitting regions are localized in the vicinity of the center in the entire element region. A plane pattern of each of the light-emitting regions is formed so that plane patterns of p-electrodes and n-electrodes are not disposed in a region sandwiched by the light-emitting regions.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: September 4, 2018
    Assignee: TOYODA GOSEI CO., LTD
    Inventors: Misato Boyama, Shingo Totani, Takashi Kawai
  • Patent number: 9773947
    Abstract: An emission efficiency of a light-emitting device is improved by reducing strains applied to a light-emitting layer. On a sapphire substrate, an n-type contact layer, an nESD layer, an n-type cladding layer, a light-emitting layer, a p-type cladding layer, and a p-type contact layer, are sequentially deposited. The light-emitting layer has a MQW structure in which a layer unit of a well layer, a capping layer, and a barrier layer sequentially deposited is repeatedly deposited. Of the well layers, the In composition ratio of only first well layer is reduced than the In composition ratios of other well layers, and the In composition ratios of the other well layers are equal to each other. The In composition ratio of the first well layer is designed so that the emission wavelength of the first well layer is equal to the emission wavelengths of other well layers.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: September 26, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Ryo Nakamura, Misato Boyama
  • Patent number: 9711684
    Abstract: There is provided a Group III nitride semiconductor light-emitting device in which electrons and holes are suppressed to be captured by threading dislocation, and a production method therefor. The light-emitting device comprises an n-type semiconductor layer, a light-emitting layer on the n-type semiconductor layer, a p-type semiconductor layer on the light-emitting layer. The light-emitting device has a plurality of pits extending from the n-type semiconductor layer to the p-type semiconductor layer. The n-type semiconductor layer includes an n-side electrostatic breakdown preventing layer. The n-side electrostatic breakdown preventing layer comprises an n-type GaN layer containing starting point of the pits, and an ud-GaN layer disposed adjacent to the n-type GaN layer and containing a part of the pits. At least one of the n-type GaN layer and the ud-GaN layer has an In-doped layer. The In composition ratio of the In-doped layer is more than 0 and not more than 0.0035.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: July 18, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Yoshiki Saito, Misato Boyama
  • Publication number: 20170084782
    Abstract: The present invention provides a light-emitting device suppressing the reduction in the light output while improving the response speed. As shown in FIG. 1, the light-emitting device comprises four square element regions arranged with the sides of the element regions aligned in a two by two lattice. The light-emitting regions are disposed in the vicinity of corners at the center side of the element regions, and the light-emitting regions are localized in the vicinity of the center in the entire element region. A plane pattern of each of the light-emitting regions is formed so that plane patterns of p-electrodes and n-electrodes are not disposed in a region sandwiched by the light-emitting regions.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 23, 2017
    Inventors: Misato BOYAMA, Shingo TOTANI, Takashi KAWAI
  • Publication number: 20170077173
    Abstract: To provide a light-emitting unit having a semiconductor light-emitting device with a good responsiveness and a sufficient light emission quantity. The light-emitting unit comprises a plurality of semiconductor light-emitting devices, an n-wiring electrode and a p-wiring electrode respectively connecting the semiconductor light-emitting devices in parallel, an n-pad electrode connected to the n-wiring electrode, and a p-pad electrode connected to the p-wiring electrode. At least one of the Group III nitride semiconductor light-emitting devices has a light emission volume of 1 ?m3 to 14 ?m3.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 16, 2017
    Inventors: MISATO BOYAMA, SHINGO TOTANI, TAKASHI KAWAI, YOSHIKI SAITO, NAOYUKI OKITA
  • Patent number: 9595633
    Abstract: On the well layer, a first InGaN protective layer is formed at the same temperature employed for the well layer through MOCVD. TMI is pulse supplied. A TMI supply amount is kept constant at a predetermined value of more than 0 ?mol/min and not more than 2 ?mol/min. Moreover, a duty ratio is kept constant at a predetermined value of more than 0 and not more than 0.95. The In composition ratio of the first protective layer is almost directly proportional to the duty ratio. The In composition ratio of the first protective layer can be easily and accurately controlled by controlling the duty ratio so as to have an In composition ratio within a range of more than 0 at % and not more than 3 at %.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: March 14, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Ryo Nakamura, Misato Boyama
  • Patent number: 9508895
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. A light-emitting layer has a MQW structure in which a plurality of layer units are repeatedly deposited, each layer unit comprising a well layer, a protective layer, and a barrier layer sequentially deposited. The protective layer has a layered structure comprising a second protective layer disposed in contact with and on the well layer, and a first protective layer disposed in contact with and on the second protective layer. The second protective layer is formed of GaN. The first protective layer is formed of AlGaInN. The first protective layer has a bandgap larger than that of the well layer and not larger than that of the barrier layer. Moreover, the first protective layer has an In composition ratio of more than 0% and not more than 4%.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: November 29, 2016
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Ryo Nakamura, Misato Boyama
  • Publication number: 20160276537
    Abstract: An emission efficiency of a light-emitting device is improved by reducing strains applied to a light-emitting layer. On a sapphire substrate, an n-type contact layer, an nESD layer, an n-type cladding layer, a light-emitting layer, a p-type cladding layer, and a p-type contact layer, are sequentially deposited. The light-emitting layer has a MQW structure in which a layer unit of a well layer, a capping layer, and a barrier layer sequentially deposited is repeatedly deposited. Of the well layers, the In composition ratio of only first well layer is reduced than the In composition ratios of other well layers, and the In composition ratios of the other well layers are equal to each other. The In composition ratio of the first well layer is designed so that the emission wavelength of the first well layer is equal to the emission wavelengths of other well layers.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 22, 2016
    Inventors: Ryo NAKAMURA, Misato Boyama
  • Publication number: 20160260868
    Abstract: There is provided a Group III nitride semiconductor light-emitting device in which electrons and holes are suppressed to be captured by threading dislocation, and a production method therefor. The light-emitting device comprises an n-type semiconductor layer, a light-emitting layer on the n-type semiconductor layer, a p-type semiconductor layer on the light-emitting layer. The light-emitting device has a plurality of pits extending from the n-type semiconductor layer to the p-type semiconductor layer. The n-type semiconductor layer includes an n-side electrostatic breakdown preventing layer. The n-side electrostatic breakdown preventing layer comprises an n-type GaN layer containing starting point of the pits, and an ud-GaN layer disposed adjacent to the n-type GaN layer and containing a part of the pits. At least one of the n-type GaN layer and the ud-GaN layer has an In-doped layer. The In composition ratio of the In-doped layer is more than 0 and not more than 0.0035.
    Type: Application
    Filed: March 2, 2016
    Publication date: September 8, 2016
    Inventors: Yoshiki SAITO, Misato BOYAMA
  • Publication number: 20160126415
    Abstract: On the well layer, a first InGaN protective layer is formed at the same temperature employed for the well layer through MOCVD. TMI is pulse supplied. A TMI supply amount is kept constant at a predetermined value of more than 0 ?mol/min and not more than 2 ?mol/min. Moreover, a duty ratio is kept constant at a predetermined value of more than 0 and not more than 0.95. The In composition ratio of the first protective layer is almost directly proportional to the duty ratio. The In composition ratio of the first protective layer can be easily and accurately controlled by controlling the duty ratio so as to have an In composition ratio within a range of more than 0 at % and not more than 3 at %.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Ryo NAKAMURA, Misato BOYAMA
  • Publication number: 20150236198
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. A light-emitting layer has a MQW structure in which a plurality of layer units are repeatedly deposited, each layer unit comprising a well layer, a protective layer, and a barrier layer sequentially deposited. The protective layer has a layered structure comprising a second protective layer disposed in contact with and on the well layer, and a first protective layer disposed in contact with and on the second protective layer. The second protective layer is formed of GaN. The first protective layer is formed of AlGaInN. The first protective layer has a bandgap larger than that of the well layer and not larger than that of the barrier layer. Moreover, the first protective layer has an In composition ratio of more than 0% and not more than 4%.
    Type: Application
    Filed: February 9, 2015
    Publication date: August 20, 2015
    Inventors: Ryo NAKAMURA, Misato BOYAMA