Patents by Inventor Misato HISANO

Misato HISANO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing semiconductor device including forming protective film within recess in substrate
    Patent number: 10325776
    Abstract: An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si substrate (1). After forming the n-type layer (3), an oxide film (5) is formed on the back surface and in the recess (4). The oxide film (5) on the back surface is removed while the oxide film (5) in the recess (4) is left. After removing the oxide film (5), an Al—Si film (6) is formed on the back surface. A metal electrode (7) is formed on the Al—Si film (6). The oxide film (5) in the recess (4) prevents Al from diffusing from the Al—Si film (6) into the Si substrate (1) through the recess (4).
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 18, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Misato Hisano
  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING FORMING PROTECTIVE FILM WITHIN RECESS IN SUBSTRATE
    Publication number: 20180144942
    Abstract: An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si substrate (1). After forming the n-type layer (3), an oxide film (5) is formed on the back surface and in the recess (4). The oxide film (5) on the back surface is removed while the oxide film (5) in the recess (4) is left. After removing the oxide film (5), an Al—Si film (6) is formed on the back surface. A metal electrode (7) is formed on the Al—Si film (6). The oxide film (5) in the recess (4) prevents Al from diffusing from the Al—Si film (6) into the Si substrate (1) through the recess (4).
    Type: Application
    Filed: January 19, 2018
    Publication date: May 24, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventor: Misato Hisano
  • Method of manufacturing semiconductor device including forming protective film within recess in substrate
    Patent number: 9947544
    Abstract: An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si substrate (1). After forming the n-type layer (3), an oxide film (5) is formed on the back surface and in the recess (4). The oxide film (5) on the back surface is removed while the oxide film (5) in the recess (4) is left. After removing the oxide film (5), an Al—Si film (6) is formed on the back surface. A metal electrode (7) is formed on the Al—Si film (6). The oxide film (5) in the recess (4) prevents Al from diffusing from the Al—Si film (6) into the Si substrate (1) through the recess (4).
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: April 17, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Misato Hisano
  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20170040171
    Abstract: An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si substrate (1). After forming the n-type layer (3), an oxide film (5) is formed on the back surface and in the recess (4). The oxide film (5) on the back surface is removed while the oxide film (5) in the recess (4) is left. After removing the oxide film (5), an Al—Si film (6) is formed on the back surface, A metal electrode (7) is formed on the Al—Si film (6). The oxide film (5) in the recess (4) prevents Al from diffusing from the Al—Si film (6) into the Si substrate (1) through the recess (4).
    Type: Application
    Filed: July 31, 2014
    Publication date: February 9, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Misato HISANO