Patents by Inventor Misuk Yamazaki

Misuk Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8426754
    Abstract: An electrical contact comprising a contact layer for making a contact with an opposite electrical contact and a high conductive layer in an opposite side of the contact layer, the layers being integrally connected to each other, wherein the contact layer contains Cr, Cu and Te, and the high conductive layer contains copper as a main component, and wherein the high conductive layer is provided with a means for suppressing warp of the contact layer at the time of turning on of the contacts.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: April 23, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Shigeru Kikuchi, Satoru Kajiwara, Masato Kobayashi, Misuk Yamazaki
  • Publication number: 20090184274
    Abstract: An electrical contact comprising a contact layer for making a contact with an opposite electrical contact and a high conductive layer in an opposite side of the contact layer, the layers being integrally connected to each other, wherein the contact layer contains Cr, Cu and Te, and the high conductive layer contains copper as a main component, and wherein the high conductive layer is provided with a means for suppressing warp of the contact layer at the time of turning on of the contacts.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 23, 2009
    Inventors: Shigeru Kikuchi, Satoru Kajiwara, Masato Kobayashi, Misuk Yamazaki
  • Patent number: 7061090
    Abstract: A semiconductor device comprises a semi-conductor chip bonded on a top surface inside a case electrode by a bonding material and a lead electrode bonded on a top surface of the semiconductor chip by a bonding material with a space of the case electrode filled with an insulating material for sealing the bonded sections, wherein a groove is provided on a top surface of the case electrode from an edge of the semiconductor chip, to thereby reduce heat distortion which is generated on a large scale at an end of the bonding material on account of a difference in coefficients of linear thermal expansion between the semiconductor chip and the case electrode and improve the thermal fatigue life.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: June 13, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Misuk Yamazaki, Tatsuo Yamazaki
  • Patent number: 7002244
    Abstract: There is a need to provide a semiconductor device in which strain in a bonding member resulting from the difference in thermal deformation between a lead electrode and a semiconductor chip, which are electrically bonded to each other by the bonding member, is reduced for an improved thermal fatigue lifetime and the semiconductor chip has an improved current carrying capacity and enhanced heat dissipation.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: February 21, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Misuk Yamazaki, Satoshi Matsuyoshi, Chikara Makajima
  • Publication number: 20040135244
    Abstract: There is a need to provide a semiconductor device in which strain in a bonding member resulting from the difference in thermal deformation between a lead electrode and a semiconductor chip, which are electrically bonded to each other by the bonding member, is reduced for an improved thermal fatigue lifetime and the semiconductor chip has an improved current carrying capacity and enhanced heat dissipation.
    Type: Application
    Filed: January 5, 2004
    Publication date: July 15, 2004
    Inventors: Misuk Yamazaki, Satoshi Matsuyoshi, Chikara Makajima
  • Publication number: 20030168722
    Abstract: A semiconductor device comprises a semiconductor chip bonded on a top surface inside a case electrode by a bonding material and a lead electrode bonded on a top surface of the semiconductor chip by a bonding material with a space of the case electrode filled with an insulating material for sealing the bonded sections, wherein a groove is provided on a top surface of the case electrode from an edge of the semiconductor chip, to thereby reduce heat distortion which is generated on a large scale at an end of the bonding material on account of a difference in coefficients of linear thermal expansion between the semiconductor chip and the case electrode and improve the thermal fatigue life.
    Type: Application
    Filed: March 7, 2003
    Publication date: September 11, 2003
    Inventors: Misuk Yamazaki, Tatsuo Yamazaki
  • Publication number: 20020140059
    Abstract: A semiconductor device includes a lead electrode connected to a lead, a case electrode having a projection part around its periphery, and a semiconductor chip having a rectification function and connected electrically between the lead electrode and the case electrode through connection members, wherein an electrically conductive plate is provided between the semiconductor chip and the lead electrode. Thereby, any of cracks is prevented from being generated in the semiconductor chip due to the mutual thermal deformation difference between the electrically conductive plate and the semiconductor chip which are electrically joined to each other through a joining member.
    Type: Application
    Filed: February 6, 2002
    Publication date: October 3, 2002
    Inventors: Misuk Yamazaki, Makoto Kitano