Patents by Inventor Mitch C. Taylor

Mitch C. Taylor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Device structure and method for reducing silicide encroachment
    Patent number: 6777759
    Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: August 17, 2004
    Assignee: Intel Corporation
    Inventors: Robert S. Chau, Ebrahim Andideh, Mitch C. Taylor, Chia-Hong Jan, Julie Tsai
  • Device structure and method for reducing silicide encroachment
    Patent number: 6765273
    Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: July 20, 2004
    Assignee: Intel Corporation
    Inventors: Robert S. Chau, Ebrahim Andideh, Mitch C. Taylor, Chia-Hong Jan, Julie Tsai
  • Device structure and method for reducing silicide encroachment
    Patent number: 6518155
    Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: February 11, 2003
    Assignee: Intel Corporation
    Inventors: Robert S. Chau, Ebrahim Andideh, Mitch C. Taylor, Chia-Hong Jan, Julie Tsai
  • Device structure and method for reducing silicide encroachment
    Publication number: 20020053711
    Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.
    Type: Application
    Filed: December 7, 2001
    Publication date: May 9, 2002
    Inventors: Robert S. Chau, Ebrahim Andideh, Mitch C. Taylor, Chia-Hong Jan, Julie Tsai