Patents by Inventor Mitchel Obolsky

Mitchel Obolsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic circuit and method for testing and refreshing non-volatile memory
    Patent number: 6563740
    Abstract: An electronic circuit includes a non-volatile memory on an integrated circuit that has several memory cells. The cells each have a voltage state and a gate. A gate bias circuit on the integrated circuit is coupled to the gates of the memory cells. The gate bias circuit includes at least a read voltage and a margin voltage. A detection circuit on the integrated circuit is coupled to the cells. The detection circuit includes a comparator and a reference voltage. The reference voltage and the voltage state of one of the cells are coupled to the comparator. The detection circuit includes an output generating a signal corresponding to the comparator output. The integrated circuit includes a monitor circuit. The monitor circuit is coupled to the output of the detection circuit and determines whether the voltage state of the cell transitions between application of the read and margin voltages to the gate.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: May 13, 2003
    Assignee: Microchip Technology Incorporated
    Inventors: Joseph A. Thomsen, Mitchel Obolsky, Joseph W. Triece
  • Electronic circuit and method for testing and refreshing non-volatile memory
    Publication number: 20030048665
    Abstract: An electronic circuit includes a non-volatile memory on an integrated circuit that has several memory cells. The cells each have a voltage state and a gate. A gate bias circuit on the integrated circuit is coupled to the gates of the memory cells. The gate bias circuit includes at least a read voltage and a margin voltage. A detection circuit on the integrated circuit is coupled to the cells. The detection circuit includes a comparator and a reference voltage. The reference voltage and the voltage state of one of the cells are coupled to the comparator. The detection circuit includes an output generating a signal corresponding to the comparator output. The integrated circuit includes a monitor circuit. The monitor circuit is coupled to the output of the detection circuit and determines whether the voltage state of the cell transitions between application of the read and margin voltages to the gate.
    Type: Application
    Filed: September 13, 2001
    Publication date: March 13, 2003
    Inventors: Joseph A. Thomsen, Mitchel Obolsky, Joseph W. Triece