Patents by Inventor Mitchell A. Belser

Mitchell A. Belser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8274303
    Abstract: A Schmitt trigger circuit having a test circuit and method for testing are provided. The Schmitt trigger test circuit includes switches for reconfiguring the Schmitt trigger for testing by shorting the input and output terminals of an inverter and by opening a feedback path to allow the application of test voltages to the gates of feedback transistors coupled to the inverter. The method includes: directly connecting an input terminal of the inverter to an output terminal of the inverter; providing a first power supply voltage to the feedback transistors coupled to the inverter; measuring a first voltage at the input terminal; removing the first power supply voltage from the feedback transistors; providing a second power supply voltage to the feedback transistors. The test circuit and method reduce the test time by eliminating the need to ramp an input voltage while monitoring the output.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 25, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mitchell A. Belser, Eric W. Tisinger
  • Publication number: 20120049875
    Abstract: A Schmitt trigger circuit having a test circuit and method for testing are provided. The Schmitt trigger test circuit includes switches for reconfiguring the Schmitt trigger for testing by shorting the input and output terminals of an inverter and by opening a feedback path to allow the application of test voltages to the gates of feedback transistors coupled to the inverter. The method includes: directly connecting an input terminal of the inverter to an output terminal of the inverter; providing a first power supply voltage to the feedback transistors coupled to the inverter; measuring a first voltage at the input terminal; removing the first power supply voltage from the feedback transistors; providing a second power supply voltage to the feedback transistors. The test circuit and method reduce the test time by eliminating the need to ramp an input voltage while monitoring the output.
    Type: Application
    Filed: August 30, 2010
    Publication date: March 1, 2012
    Inventors: MITCHELL A. BELSER, ERIC W. TISINGER
  • Patent number: 6031363
    Abstract: A voltage regulator which has two regulation circuits and a comparator for controlling the two regulation circuits is disclosed. The input of the comparator is connected to a power supply voltage such that the output of the comparator changes states when the power supply voltage reaches a predetermined voltage of around 8 volts. The first regulation circuit is enabled to provide the Vcc from the battery voltage until the power supply voltage reaches around 8 volts which is when the comparator changes states. At that point, the first regulation is disabled and the second regulation circuit is enabled to provide the Vcc voltage from the power supply voltage. Since the power supply voltage never reaches the load dump high voltages, the second pass transistors never gets exposed to a high voltage condition. Also, the first transistor can withstand higher voltages since its base is grounded.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: February 29, 2000
    Assignee: STMicroelectronics, Inc.
    Inventors: Eric J. Danstrom, Mitchell A. Belser, William E. Edwards