Abstract: Characterized nonlinearities in a QAM transmission channel are removed by this linearizer, in which selected bits from a sequence of received symbols on both rails form the address of a PROM. Stored values represent the Volterra expansion of the response of the channel, including the nonlinearity, to the symbol sequence. Symmetries in the Volterra expansion allow the same stored value to be used to correct both AM/AM same rail and AM/PM opposite rail distortion.

Abstract: A novel circuit recovers a carrier signal from a 16 or 64 QAM double sideband suppressed carrier IF signal for use in synchronolus demodulation. A 70 MHz IF signal is fed to a power splitter for distributing the signals to a demodulator and to a quadrupler. The 280 MHz signal from the quadrupler is fed to a surface acoustic wave filter to extract the components of the double sideband suppressed carrier signal and the output therefrom is amplified prior to being divided by four to recover the 70 MHz signal. The 70 MHz signal is delivered to a phase frequency detector which provides an error signal during acquisition to deviate a VCO toward the received frequency and thus obtain very fast acquisition time. When the VCO is locked, the phase frequency detector is disconnected from the summing node of a PLL, and a correlated error polarity adaptive carrier recovery circuit operates the demodulator.

Abstract: An improvement in tracking the signal-eyes (FIG. 4) formed by a digital signal is disclosed. This improvement is achieved by forming a sample at a regeneration sampling time (e.g., 404), a first sampling time (e.g., 401) and a second sampling time (e.g., 402). The first and second sampling times respectively precede and succeed the signal-eyes while each regeneration sampling time occurs within the signal-eyes. The amplitude of each sample represents the amplitude of the digital signal at the sampling time relative to a reference level (e.g., 301, 302 or 303) which passes through one of the signal-eyes. A first comparison signal is generated by comparing the amplitudes of the samples at the regeneration and adjacent first sampling times. Similarly, a second comparison signal is generated by comparing the amplitudes of the samples at the regeneration and adjacent second sampling times. The difference between the first and second comparison signal is then averaged to form an error signal.

Abstract: The adaptive decision level circuit (FIG. 3) slices a digital signal with respect to a decision level disposed between the signal levels. A correction signal generated from the sliced signals (S, S) compensates for variations in the signal levels by maintaining the decision level at a constant position relative to the signal levels. The correction signal is generated by comparing (321) the integrated difference (on lead 305) between the sliced signal and its complement with the statistically expected value (312) of the difference between the sliced signal and its complement. In the preferred embodiment, the expected value is equal to one-half the signal swing of the sliced signal.