Abstract: Program code loaded for execution by a computer can be dynamically instrumented to collect event data by inserting an instruction at a trace point within the program code as loaded in a memory space of a computer, where the trace point corresponds to the beginning of a predefined function of the program selected for event tracing. The instruction provides for the direction of the execution of said computer to a function proxy routine, which includes a call to an instance of the predefined function. Event data is collected in connection with the calling of the instance of the predefined function.

Abstract: Program code loaded for execution by a computer can be dynamically instrumented to collect event data by inserting an instruction at a trace point within the program code as loaded in a memory space of a computer, where the trace point corresponds to the beginning of a predefined function of the program selected for event tracing. The instruction provides for the direction of the execution of said computer to a function proxy routine, which includes a call to an instance of the predefined function. Event data is collected in connection with the calling of the instance of the predefined function.

Abstract: A computer architecture having a main memory suitable for the storage of programs and data accessible within a predefined memory address space, a central processor capable of accessing the memory address space and a modified disk operating system program capable of execution from ROM or in a diskless environment. The operating system, upon execution by the processor, provides for the reservation of a first portion of the memory address space for support and application programs, preferably in a disk paradigm, a second portion for dynamic allocation and recovery by the operating system as necessary for the execution of support and application programs, and a third portion, located within said second portion, for the static storage, at predefined addresses, of the executable code segments of the support and application programs. Each support and application program includes an address reference to its corresponding executable code segment, in the third portion of the memory address space.

Abstract: A software architecture is implemented through the execution of instructions by a processor. The software architecture provides a first task for performing a first function in response to the occurrence of an interrupt. The first task is assigned a first priority level that is one of a predetermined set of priority levels. A server task is provided to perform a second function in response to the occurrence of the interrupt. The server task is assigned a second priority level that is between predetermined ones of the priority levels of the predetermined set of priority levels. The second priority level is alternately set higher than the first priority level. The operating system kernel includes a scheduler that selects tasks for execution based on relative task priority level. The kernel includes an interrupt handler that provides for setting the server task in a schedulable state in response to the occurrence of the interrupt.