Patents by Inventor Mitchell Heschke

Mitchell Heschke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250087557
    Abstract: The systems, methods, and devices disclosed herein relate to sandwiched multi-layer structures for cooling electronics. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer, the first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. In some embodiments, at least one layer can use system on wafer packaging.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 13, 2025
    Inventors: Aydin Nabovati, Mitchell Heschke, Zheng Gao, Vijaykumar Krithivasan, Mohamed Haitham Helmy Nasr
  • Publication number: 20240356255
    Abstract: An array of compliant connectors for electronic assemblies is provided. In one aspect, a system includes an array of first electronic components and an array of second electronic components. Each of the second electronic components is paired with corresponding to one of the first electronic components. Each pair of the first and second electronic components is coupled via a plurality of compliant connectors.
    Type: Application
    Filed: August 12, 2022
    Publication date: October 24, 2024
    Inventors: Rishabh Bhandari, Yong guo Li, Mohamed Haitham Helmy Nasr, Samuel Lichy, Aydin Nabovati, Shiva Farzinazar, Mitchell Heschke
  • Publication number: 20240234333
    Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.
    Type: Application
    Filed: February 23, 2022
    Publication date: July 11, 2024
    Inventors: Yong guo Li, Rishabh Bhandari, Aydin Nabovati, Ron Rosenberg, Vijaykumar Krithivasan, Mitchell Heschke
  • Patent number: 11973004
    Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: April 30, 2024
    Assignee: Tesla, Inc.
    Inventors: Robert Yinan Cao, Mitchell Heschke, Mengzhi Pang, Shishuang Sun, Vijaykumar Krithivasan
  • Publication number: 20240136303
    Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.
    Type: Application
    Filed: February 23, 2022
    Publication date: April 25, 2024
    Inventors: Yong guo Li, Rishabh Bhandari, Aydin Nabovati, Ron Rosenberg, Vijaykumar Krithivasan, Mitchell Heschke
  • Publication number: 20210351104
    Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.
    Type: Application
    Filed: September 19, 2019
    Publication date: November 11, 2021
    Inventors: Robert Yinan Cao, Mitchell Heschke, Mengzhi Pang, Shishuang Sun, Vijaykumar Krithivasan
  • Patent number: 10148800
    Abstract: An electronic device includes an internal microphone that is located remotely from a microphone aperture formed in the enclosure of the electronic device. An acoustic chamber is formed within the electronic device to couple the microphone to the microphone aperture. The acoustic chamber is designed with a particular length to volume ratio that amplifies a particular range of frequencies such that the microphone maintains equal sensitivity to a desired frequency band.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: December 4, 2018
    Assignee: Apple Inc.
    Inventors: Austin Frederickson, Timothy E. Sandrik, Mitchell Heschke, Lee Hamstra