Patents by Inventor Mitchell Taylor

Mitchell Taylor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200178864
    Abstract: Disclosed herein is a method of determining dopamine concentration at a target location in neural tissue. In several embodiments, the method comprises measuring current level in response to square wave voltammetry with a coated electrode of a neural probe implanted at the target location, wherein the coated electrode comprises a coating of poly 3,4 ethylene dioxythiophene (PEDOT) doped with negatively charged carbon nanotubes (CNT), and comparing the measured current level to a control current level to determine the dopamine concentration at the target location.
    Type: Application
    Filed: November 6, 2019
    Publication date: June 11, 2020
    Inventors: Xinyan Cui, Ian Mitchell Taylor
  • Patent number: 10443626
    Abstract: A circular row of non-uniformally spaced vanes includes only one first group and only one second group of adjacent vanes, unequal first and second spacing between adjacent vanes in the first and second groups, and first spacing greater than second spacing. An embodiment with second group including only three adjacent vanes. Second spacing may be about 25%-35% smaller than a nominal uniform spacing used as a design parameter for designing spacing of the non-uniformly spaced stator vanes. Circular row may be sectored. A gas turbine engine section may include one or more rings or circular rows of fixed and/or variable non-uniformally spaced vanes. Method for designing non-uniform vane spacing for circular row includes determining nominal uniform spacing and forming first spacing and second spacing from nominal uniform spacing of vanes.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 15, 2019
    Assignee: General Electric Company
    Inventors: Mark Joseph Mielke, Peter John Wood, Brian Richard Green, Steven Mitchell Taylor, Curtis Moeckel, Mark Joseph Frisch, Joseph Michael Bruni
  • Publication number: 20190203248
    Abstract: The present invention relates to an antibody-like protein based on the tenth fibronectin type III domain (10Fn3) that binds to serum albumin. The invention further relates to fusion molecules comprising a serum albumin-binding 10Fn3 joined to a heterologous protein for use in diagnostic and therapeutic applications.
    Type: Application
    Filed: January 10, 2019
    Publication date: July 4, 2019
    Inventors: Michael L. GOSSELIN, David FABRIZIO, Joanna F. SWAIN, Tracy MITCHELL, Ray CAMPHAUSEN, Sharon T. CLOAD, Eric FURFINE, Paul E. MORIN, Ranjan MUKHERJEE, Simeon I. TAYLOR
  • Publication number: 20180313276
    Abstract: A compressor bleed slot apparatus includes: an annular compressor casing; a stator vane row disposed inside the compressor casing; a blade row mounted for rotation about a centerline axis inside the compressor casing, axially downstream of the stator row; a bleed slot passing through the compressor casing, wherein the bleed slot is bounded by inboard and outboard walls defined within the compressor casing, the bleed slot having an inlet positioned axially between the stator vane row and the blade row, the bleed slot extending along a slot axis, at least a portion of the bleed slot lying within an axial extent of the blade row; an annular array of struts interconnecting the inboard and outboard walls; and an annular supplemental flange extending radially outward from the compressor casing, wherein at least a portion of the supplemental flange is axially positioned within an axial extent of the bleed slot.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 1, 2018
    Inventors: Steven Mitchell Taylor, Vishnu Das K, Manish Singhal, Atanu Saha, Michael Anthony Thomas
  • Publication number: 20180313364
    Abstract: A compressor bleed slot apparatus includes: an annular compressor casing; a stator vane row including a plurality of stator vanes disposed inside the compressor casing; a blade row mounted for rotation about a centerline axis inside the compressor casing, axially downstream of the stator row; a bleed slot passing through the compressor casing, the bleed slot having an inlet and an outlet and extending along a slot axis, wherein the bleed slot is bounded by inboard and outboard walls defined within the compressor casing, the inboard and outboard walls diverging from each other in a downstream direction relative to the bleed slot; and a plurality of turning vanes disposed in the slot, the turning vanes configured to reduce a tangential velocity of airflow through the bleed slot.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 1, 2018
    Inventors: Curtis William Moeckel, Matthew Ford Adam, Rudolf Konrad Selmeier, Michael Anthony Thomas, Steven Mitchell Taylor, Anton Streit
  • Publication number: 20170268537
    Abstract: A circular row of non-uniformally spaced vanes includes only one first group and only one second group of adjacent vanes, unequal first and second spacing between adjacent vanes in the first and second groups, and first spacing greater than second spacing. An embodiment with second group including only three adjacent vanes. Second spacing may be about 25%-35% smaller than a nominal uniform spacing used as a design parameter for designing spacing of the non-uniformly spaced stator vanes. Circular row may be sectored. A gas turbine engine section may include one or more rings or circular rows of fixed and/or variable non-uniformally spaced vanes. Method for designing non-uniform vane spacing for circular row includes determining nominal uniform spacing and forming first spacing and second spacing from nominal uniform spacing of vanes.
    Type: Application
    Filed: March 15, 2016
    Publication date: September 21, 2017
    Inventors: Mark Joseph Mielke, Peter John Wood, Brian Richard Green, Steven Mitchell Taylor, Curtis Moeckel, Mark Joseph Frisch, Joseph Michael Bruni
  • Publication number: 20090020825
    Abstract: Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of transistor, but is used to form both the n and p-type transistors. The workfunction of the metal layer may be converted, for example, by ion implantation to make it more suitable for use in forming transistors of the opposite type.
    Type: Application
    Filed: September 10, 2008
    Publication date: January 22, 2009
    Inventors: Mark Doczy, Mitchell Taylor, Justin K. Brask, Jack Kavalieros, Suman Datta, Matthew V. Metz, Robert S. Chau, Jack Hwang
  • Patent number: 7439113
    Abstract: Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of transistor, but is used to form both the n and p-type transistors. The workfunction of the metal layer may be converted, for example, by ion implantation to make it more suitable for use in forming transistors of the opposite type.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: October 21, 2008
    Assignee: Intel Corporation
    Inventors: Mark Doczy, Mitchell Taylor, Justin K. Brask, Jack Kavalieros, Suman Datta, Matthew V. Metz, Robert S. Chau, Jack Hwang
  • Publication number: 20080001170
    Abstract: A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon impurities may be implanted by plasma immersion ion implantation in junction recesses to reduce boron diffusion and current leakage from boron doped junction region material deposited in the junction recesses. This may be accomplished by removing, such as by etching, portions of a substrate adjacent to a gate electrode to form junction recesses. The junction recesses may then be conformally implanted with a depth of arsenic and carbon impurities using plasma immersion ion implantation. After impurity implantation, boron doped silicon germanium can be formed in the junction recesses.
    Type: Application
    Filed: September 4, 2007
    Publication date: January 3, 2008
    Inventors: Nick Lindert, Mitchell Taylor
  • Patent number: 7211501
    Abstract: Numerous embodiments of a method and apparatus for laser annealing are disclosed. In one embodiment, a method of laser annealing includes performing one or more annealing processes on one or more portions of a semiconductor device, where one or more annealing processes performed on one or more portions of the semiconductor device are varied based at least in part on the particular portion of the semiconductor device being annealed, and/or on one or more desirable characteristics of the particular portion of the semiconductor device being annealed.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: May 1, 2007
    Assignee: Intel Corporation
    Inventors: Mark Y. Liu, Mitchell Taylor
  • Patent number: 7094029
    Abstract: A method enables a gas turbine engine compressor including a stator assembly and a rotor assembly to be assembled. The method comprises providing a casing formed from a plurality of rings, and coupling a first of the casing rings around the rotor assembly such that a radially inner surface of the first casing ring is axially aligned with, and radially outward from, a row of rotor blades extending from the rotor assembly. The method also comprises coupling a second of the casing rings to the first casing ring with a fastener assembly, such that the first casing ring radially inner surface facilitates insulating the fastener assembly from the compressor flowpath.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: August 22, 2006
    Assignee: General Electric Company
    Inventors: Steven Mitchell Taylor, Christina Marie Spencer, Dragos Nicolae Licu
  • Publication number: 20060148220
    Abstract: A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon impurities may be implanted by plasma immersion ion implantation in junction recesses to reduce boron diffusion and current leakage from boron doped junction region material deposited in the junction recesses. This may be accomplished by removing, such as by etching, portions of a substrate adjacent to a gate electrode to form junction recesses. The junction recesses may then be conformally implanted with a depth of arsenic and carbon impurities using plasma immersion ion implantation. After impurity implantation, boron doped silicon germanium can be formed in the junction recesses.
    Type: Application
    Filed: January 4, 2005
    Publication date: July 6, 2006
    Inventors: Nick Lindert, Mitchell Taylor
  • Publication number: 20060113570
    Abstract: The use of a carbon implant, in addition to the conventional fluorine implant, may significantly reduce the transient enhanced diffusion in P-type source drain extension regions. As a result, resistivity may be reduced, and dopant density may be increased, increasing current drive in some embodiments.
    Type: Application
    Filed: January 5, 2006
    Publication date: June 1, 2006
    Inventors: Aaron Vanderpool, Mitchell Taylor
  • Publication number: 20060006522
    Abstract: Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of transistor, but is used to form both the n and p-type transistors. The workfunction of the metal layer may be converted, for example, by ion implantation to make it more suitable for use in forming transistors of the opposite type.
    Type: Application
    Filed: July 12, 2004
    Publication date: January 12, 2006
    Inventors: Mark Doczy, Mitchell Taylor, Justin Brask, Jack Kavalieros, Suman Datta, Matthew Metz, Robert Chau, Jack Hwang
  • Publication number: 20050191816
    Abstract: The use of a carbon implant, in addition to the conventional fluorine implant, may significantly reduce the transient enhanced diffusion in P-type source drain extension regions. As a result, resistivity may be reduced, and dopant density may be increased, increasing current drive in some embodiments.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 1, 2005
    Inventors: Aaron Vanderpool, Mitchell Taylor
  • Publication number: 20050191834
    Abstract: A polysilicon structure may be defined on a semiconductor substrate using plasma doping to dope the sidewalls and upper surface of the polysilicon material as well as the source drain extensions. Shortly after plasma doping, the structure may be encapsulated within a suitable capping layer to prevent the removal of the thin surface doped regions during subsequent semiconductor processing.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 1, 2005
    Inventors: Jack Hwang, Mitchell Taylor, Mark Liu, Nick Lindert
  • Publication number: 20050158957
    Abstract: A polysilicon structure may be defined on a semiconductor substrate using plasma doping to dope the sidewalls and upper surface of the polysilicon material as well as the source drain extensions. Shortly after plasma doping, the structure may be encapsulated within a suitable capping layer to prevent the removal of the thin surface doped regions during subsequent semiconductor processing.
    Type: Application
    Filed: January 21, 2004
    Publication date: July 21, 2005
    Inventors: Jack Hwang, Mitchell Taylor, Mark Liu, Nick Lindert
  • Patent number: 6911706
    Abstract: By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: June 28, 2005
    Assignee: Intel Corporation
    Inventors: Jack Hwang, Craig Andyke, Mitchell Taylor
  • Publication number: 20050048738
    Abstract: Arrangements incorporating laser-induced cleaving.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 3, 2005
    Inventors: Mohamad Shaheen, Mark Liu, Mitchell Taylor
  • Publication number: 20040223846
    Abstract: A method enables a gas turbine engine compressor including a stator assembly and a rotor assembly to be assembled. The method comprises providing a casing formed from a plurality of rings, and coupling a first of the casing rings around the rotor assembly such that a radially inner surface of the first casing ring is axially aligned with, and radially outward from, a row of rotor blades extending from the rotor assembly. The method also comprises coupling a second of the casing rings to the first casing ring with a fastener assembly, such that the first casing ring radially inner surface facilitates insulating the fastener assembly from the compressor flowpath.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 11, 2004
    Inventors: Steven Mitchell Taylor, Christina Marie Spencer, Dragos Nicolae Licu